66-MHz Electrical Characteristics
V
DDH
V
DDL
0.5-V lag
V
DDH
cannot lag V
DDL
by more than 0.5 V
Figure G-5. Option B Power-Up Sequence Without Keep-Alive Supply
V
DDH
V
DDL
V
DDKA
0.5-V lag
V
DDH
cannot lag V
DDL
by more than 0.5 V
Figure G-6. Option B Power-Up Sequence With Keep-Alive Supply
The option B power-down sequence (excluding V
DDKA
) is:
1. The V
DDL
supply group can be fully powered-down prior to power-down of the V
DDH
supply
group, with no adverse affects to the device.
For power-down, the low voltage supply should come down before the high voltage supply, although with
varying loads, the high voltage may actually get ahead.
illustrates the power-down sequence if no keep-alive supply is required.
illustrates
the power-down sequence if a keep-alive supply is required.
MPC561/MPC563 Reference Manual, Rev. 1.2
G-16
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
