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IDT70121S25J 参数 Datasheet PDF下载

IDT70121S25J图片预览
型号: IDT70121S25J
PDF下载: 下载PDF文件 查看货源
内容描述: HIGH -SPEED 2K ×9双端口静态繁忙和中断RAM [HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT]
分类和应用:
文件页数/大小: 12 页 / 170 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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IDT 70121/70125S/L
HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT
COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
(V
CC
= 5.0V
±
10%)
70121S
70125S
Min. Max.
2.4
10
10
0.4
70121L
70125L
Min. Max. Unit
2.4
5
5
0.4
µA
µA
V
V
2654 tbl 04
Symbol
|I
LI
|
|I
LO
|
V
OL
V
OH
Parameter
Input Leakage Current
(5)
Output Leakage Current
(5)
Output Low Voltage
Output High Voltage
Test Condition
V
CC
= 5.5V, V
IN
= 0V to V
CC
V
CC
= 5.5V,
CE
= V
IH
V
OUT
= 0V to V
CC
I
OL
= 4mA
I
OH
= –4mA
NOTE:
1. At Vcc < 2.0V leakages are undefined.
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
(1,4)
(V
CC
= 5V
±
10%)
Symbol
I
CC
Parameter
Dynamic Operating
Current (Both Ports
Active)
Standby Current
(Both Ports—TTL
Level Inputs)
Standby Current
(One Port—TTL
Level Inputs)
Full Standby
Current (Both Ports
CMOS Level Inputs)
Full Standby
Current (One Port
CMOS Level Inputs)
Test
Condition
70121X25
70125X25
70121X35
70125X35
70121X45
70125X45
70121X55
70125X55
Version
Com’l.
S
L
S
L
S
L
S
L
S
L
Typ. Max. Typ. Max. Typ. Max. Typ. Max. Unit
125 260 125 250 125 245 125 240
125 220 125 210 125 205 125 200
30
30
80
80
1.0
0.2
70
70
65
45
175
145
15
5
170
140
30
30
80
80
1.0
0.2
70
70
65
45
165
135
15
5
160
130
30
30
80
80
1.0
0.2
70
70
65
45
160
130
15
5
155
125
30
30
80
80
1.0
0.2
70
70
65
45
155
125
15
5
150
120
mA
CE
= V
IL
,Outputs Open,
f = f
MAX
(2)
I
SB1
CE
"A"
and
CE
"B"
= V
IH
,
f = f
MAX
(2)
Com’l.
mA
I
SB2
CE
"A"
=V
IL
and
CE
"B"
=V
IH(5)
Active Port Outputs Open,
f = f
MAX(2)
V
IN
V
CC
– 0.2V
or V
IN
0.2V, f = 0
(3)
Com’l.
mA
I
SB3
CE
"A"
and
CE
"B"
V
CC
– 0.2V,
CE
"A"
<0.2V and
CE
"B"
>VCC-0.2V
(5
)
Com’l.
mA
I
SB4
Com’l.
mA
V
IN
V
CC
– 0.2V or
V
IN
0.2V, Active Port
Outputs Open, f = f
MAX(2)
NOTES:
1. “X” in part numbers indicates power rating (S or L).
2. At f = f
MAX
, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/t
RC
, and using “AC TEST
CONDITIONS” of input levels of GND to 3V.
3. f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby.
4. Vcc=5V, T
A
=+25°C for Typical values, and they are not production tested.
5. Port "A" may be either left or right port. Port "B" is opposite from port "A".
2654 tbl 05
6.10
3