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IDT71V3576S133PF 参数 Datasheet PDF下载

IDT71V3576S133PF图片预览
型号: IDT71V3576S133PF
PDF下载: 下载PDF文件 查看货源
内容描述: 128K ×36 , 256K ×18的3.3V同步SRAM 3.3VI / O ,流水线突发输出计数器,单周期取消 [128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect]
分类和应用: 计数器存储内存集成电路静态存储器时钟
文件页数/大小: 22 页 / 286 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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IDT71V3576, IDT71V3578, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with
3.3V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect
Commercial and Industrial Temperature Ranges
AC Electrical Characteristics
(V
DD
= 3.3V ±5%, Commercial and Industrial Temperature Ranges)
150MHz
Symbol
Parameter
Min.
Max.
Min.
133MHz
Max.
Unit
t
CYC
t
CH
(1)
t
CL
(1)
Clock Cycle Time
Clock High Pulse Width
Clock Low Pulse Width
6.7
2.6
2.6
____
7.5
3
3
____
ns
ns
ns
____
____
____
____
Output Parameters
t
CD
t
CDC
t
CLZ
(2)
t
CHZ
(2)
t
OE
t
OLZ
(2)
t
OHZ
(2)
Clock High to Valid Data
Clock High to Data Change
Clock High to Output Active
Clock High to Data High-Z
Output Enable Access Time
Output Enable Low to Output Active
Output Enable High to Output High-Z
____
3.8
____
____
4.2
____
ns
ns
ns
ns
ns
ns
ns
1.5
0
1.5
____
1.5
0
1.5
____
____
____
3.8
3.8
____
4.2
4.2
____
0
____
0
____
3.8
4.2
Set Up Times
t
SA
t
SS
t
SD
t
SW
t
SAV
t
SC
Address Setup Time
Address Status Setup Time
Data In Setup Time
Write Setup Time
Address Advance Setup Time
Chip Enable/Select Setup Time
1.5
1.5
1.5
1.5
1.5
1.5
____
____
____
____
____
____
1.5
1.5
1.5
1.5
1.5
1.5
____
____
____
____
____
____
ns
ns
ns
ns
ns
ns
Hold Times
t
HA
t
HS
t
HD
t
HW
t
HAV
t
HC
Address Hold Time
Address Status Hold Time
Data In Hold Time
Write Hold Time
Address Advance Hold Time
Chip Enable/Select Hold Time
0.5
0.5
0.5
0.5
0.5
0.5
____
____
0.5
0.5
0.5
0.5
0.5
0.5
____
____
ns
ns
ns
ns
ns
ns
____
____
____
____
____
____
____
____
Sleep Mode and Configuration Parameters
t
ZZPW
t
ZZR
(3)
t
CFG
(4)
ZZ Pulse Width
ZZ Recovery Time
Configuration Set-up Time
100
100
27
____
100
100
30
____
ns
ns
ns
5279 tbl 16
____
____
____
____
NOTES:
1. Measured as HIGH above V
IH
and LOW below V
IL
.
2. Transition is measured ±200mV from steady-state.
3. Device must be deselected when powered-up from sleep mode.
4. t
CFG
is the minimum time required to configure the device based on the
LBO
input.
LBO
is a static input and must not change during normal operation.
6.42
12