IDT71V3576, IDT71V3578, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with
3.3V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect
Commercial and Industrial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(V
DD
= 3.3V ± 5%)
Symbol
|I
LI
|
|I
LZZ
|
|I
LO
|
V
OL
V
OH
Parameter
Input Leakage Current
ZZ,
LBO
and JTAG Input Leakage Current
(1)
Output Leakage Current
Output Low Voltage
Output High Voltage
Test Conditions
V
DD
= Max., V
IN
= 0V to V
DD
V
DD
= Max., V
IN
= 0V to V
DD
V
OUT
= 0V to V
DDQ
, Device Deselected
I
OL
= +8mA, V
DD
= Min.
I
OH
= -8mA, V
DD
= Min.
Min.
___
Max.
5
30
5
0.4
___
Unit
µA
µA
µA
V
V
5279 tbl 08
___
___
___
2.4
NOTE:
1. The
LBO,
TMS, TDI, TCK and
TRST
pins will be internally pulled to V
DD
and the ZZ pin will be internally pulled to V
SS
if they are not actively driven in the application.
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(1)
150MHz
Symbol
I
DD
I
SB1
I
SB2
I
ZZ
Parameter
Operating Power Supply
Current
CMOS Standby Power
Supply Current
Clock Running Power
Supply Current
Full Sleep Mode Supply
Current
Test Conditions
Device Selected, Outputs Open, V
DD
= Max.,
V
DDQ
= Max., V
IN
> V
IH
or < V
IL
, f = f
MAX
(2)
Device Deselected, Outputs Open, V
DD
= Max.,
V
DDQ
= Max., V
IN
> V
HD
or < V
LD
, f = 0
(2,3)
Device Deselected, Outputs Open, V
DD
= Max.,
V
DDQ
= Max., V
IN
> V
HD
or < V
LD
, f = f
MAX
(2,3)
ZZ > V
HD,
V
DD
= Max.
Com'l
295
30
105
30
Ind
305
35
115
35
133MHz
Com'l
250
30
100
30
Ind
260
35
110
35
Unit
mA
mA
mA
mA
5279 tbl 09
NOTES:
1. All values are maximum guaranteed values.
2. At f = f
MAX,
inputs are cycling at the maximum frequency of read cycles of 1/t
CYC
while
ADSC
= LOW; f=0 means no input lines are changing.
3. For I/Os V
HD
= V
DDQ
- 0.2V, V
LD
= 0.2V. For other inputs V
HD
= V
DD
- 0.2V, V
LD
= 0.2V.
AC Test Conditions
(V
DDQ
= 3.3V)
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
AC Test Load
0 to 3V
2ns
1.5V
1.5V
See Figure 1
5279 tbl 10
AC Test Load
I/O
Z
0
= 50Ω
V
DDQ
/2
50Ω
,
5279 drw 06
Figure 1. AC Test Load
6
5
4
∆tCD
3
(Typical, ns)
2
1
20 30 50
80 100
Capacitance (pF)
200
5279 drw 07
,
Figure 2. Lumped Capacitive Load, Typical Derating
6.42
9
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
