IDT72421/72201/72211/72221/72231/72241 CMOS SyncFIFO™
64 x 9, 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS
(Commercial: V
CC
= 5V
±
10%, T
A
= 0°C to +70°C; Military: V
CC
= 5V
±
10%, T
A
= –55°C to +125°C)
Commercial
Commercial and Military
72221L15
72221L20 72221L25 72221L35 72221L50
72231L15
72231L20 72231L25 72231L35 72231L50
72241L15
72241L20 72241L25 72241L35 72241L50
Symbol
f
S
t
A
t
CLK
t
CLKH
t
CLKL
t
DS
t
DH
t
ENS
t
ENH
t
RS
t
RSS
t
RSR
t
RSF
t
OLZ
t
OE
t
OHZ
t
WFF
t
REF
t
PAF
t
PAE
Data Access Time
Clock Cycle Time
Clock HIGH Time
Clock LOW Time
Data Set-up Time
Data Hold Time
Enable Set-up Time
Enable Hold Time
Reset Pulse Width
(1)
Reset Set-up Time
Reset Recovery Time
Reset to Flag Time and Output Time
Output Enable to Output in Low-Z
(2)
Output Enable to Output Valid
Output Enable to Output in High-Z
(2)
Write Clock to Full Flag
Read Clock to Empty Flag
Write Clock to Programmable Almost-Full Flag
Read Clock to Programmable Almost-Empty Flag
Parameter
Clock Cycle Frequency
Min. Max. Min. Max.
—
2
15
6
6
4
1
4
1
15
15
15
—
0
3
3
—
—
—
—
6
28
66.7
10
—
—
—
—
—
—
—
—
—
—
15
—
8
8
10
10
10
10
—
—
—
2
20
8
8
5
1
5
1
20
20
20
—
0
3
3
—
—
—
—
8
35
50
12
—
—
—
—
—
—
—
—
—
—
20
—
10
10
12
12
12
12
—
—
Min. Max. Min. Max. Min. Max.
—
3
25
10
10
6
1
6
1
25
25
25
—
0
3
3
—
—
—
—
10
40
40
15
—
—
—
—
—
—
—
—
—
—
25
—
13
13
15
15
15
15
—
—
—
3
35
14
14
8
2
8
2
35
35
35
—
0
3
3
—
—
—
—
12
42
28.6
20
—
—
—
—
—
—
—
—
—
—
35
—
15
15
20
20
20
20
—
—
—
3
50
20
20
10
2
10
2
50
50
50
—
0
3
3
—
—
—
—
15
45
20
25
—
—
—
—
—
—
—
—
—
—
50
—
28
28
30
30
30
30
—
—
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
SKEW1
Skew Time Between Read Clock and Write Clock
for Empty Flag and Full Flag
t
SKEW2
Skew Time Between Read Clock and Write Clock
for Programmable Almost-Empty Flag and
Programmable Almost-Full Flag
NOTES:
1. Pulse widths less than minimum values are not allowed.
2. Values guaranteed by design, not currently tested.
2655 tbl 08
5V
1.1K
D.U.T.
AC TEST CONDITIONS
In Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
3ns
1.5V
1.5V
See Figure 1
2655 tbl 09
680Ω
30pF*
2655 drw 03
or equivalent circuit
Figure 1. Output Load
*Includes jig and scope capacitances.
5.07
5
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
