IDT72V801/72V811/72V821/72V831/72V841/72V851
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
OUTPUTS:
Full Flag (FFA,
FFB)
—
FFA
(FFB) will go LOW, inhibiting further write
operations, when Array A (B) is full. If no reads are performed after reset,
FFA
(FFB) will go LOW after 256 writes to the IDT72V801's FIFO A (B), 512
writes to the IDT72V811's FIFO A (B), 1,024 writes to the IDT72V821's FIFO
A (B), 2,048 writes to the IDT72V831's FIFO A (B), 4,096 writes to the
IDT72V841's FIFO A (B), or 8,192 writes to the IDT72V851's FIFO A (B).
FFA
(FFB) is synchronized with respect to the LOW-to-HIGH transition of
the Write Clock WCLKA (WCLKB).
Empty Flag (EFA,
EFB)
—
EFA
(EFB) will go LOW, inhibiting further read
operations, when the read pointer is equal to the write pointer, indicating that
Array A (B) is empty.
EFA
(EFB) is synchronized with respect to the LOW-to-HIGH transition of
the Read Clock RCLKA (RCLKB).
the IDT72V831's FIFO A (B), (4,096-m) writes to the IDT72V841's FIFO A
(B), or (8,1912-m) writes to the IDT72V851's FIFO A (B).
FFA
(FFB) is synchronized with respect to the LOW-to-HIGH transition of
the Write Clock WCLKA (WCLKB). The offset “m” is defined in the Full Offset
Registers.
If there is no Full offset specified,
PAFA
(PAFB) will go LOW at Full-7 words.
PAFA
(PAFB) is synchronized with respect to the LOW-to-HIGH transition
of the Write Clock WCLKA (WCLKB).
Programmable Almost–Empty Flag (PAEA,
PAEB)
—
PAEA
(PAEB) will
go LOW when the read pointer is "n+1" locations less than the write pointer.
The offset "n" is defined in the Empty Offset Registers. If no reads are performed
after reset,
PAEA
(PAEB) will go HIGH after "n+1" writes to FIFO A (B).
If there is no Empty offset specified,
PAEA
(PAEB) will go LOW at Empty+7
words.
PAEA
(PAEB) is synchronized with respect to the LOW-to-HIGH transition
of the Read Clock RCLKA (RCLKB).
Data Outputs (QA
0
– QA
8,
QB
0
– QB
8
)
— QA
0
- QA
8
are the nine data
outputs for memory array A, QB
0
- QB
8
are the nine data outputs for memory
array B
.
Programmable Almost–Full Flag (PAFA,
PAFB)
—
PAFA
(PAFB) will go
LOW when the amount of data in Array A (B) reaches the Almost-Full condition.
If no reads are performed after reset,
PAFA
(PAFB) will go LOW after (256-m)
writes to the IDT72V801's FIFO A (B), (512-m) writes to the IDT72V811's FIFO
A (B), (1,024-m) writes to the IDT72V821's FIFO A (B), (2,048-m) writes to
TABLE 1: STATUS .LAGS .OR A AND B .I.OS
NUMBER OF WORDS IN ARRAY A
NUMBER OF WORDS IN ARRAY B
IDT72V801
0
1 to n
(1)
(n+1) to (256-(m+1))
(256-m)
(2)
to 255
256
IDT72V811
0
1 to n
(1)
(n+1) to (512-(m+1))
(512-m)
(2)
to 511
512
IDT72V821
0
1 to n
(1)
(n+1) to (1,024-(m+1))
(1,024-m)
(2)
to 1,023
1,024
H
H
H
H
L
H
H
H
L
L
L
L
H
H
H
L
H
H
H
H
FFA
FFB
PAFA
PAFB
PAEA
PAEB
EFA
EFB
NUMBER OF WORDS IN ARRAY A
NUMBER OF WORDS IN ARRAY B
IDT72V831
0
1 to n
(1)
(n+1) to (2,048-(m+1))
(2,048-m)
(2)
to 2,047
2,048
NOTES:
1. n = Empty Offset (n = 7 default value)
2. m = Full Offset (m = 7 default value)
FFA
FFB
IDT72V851
0
1 to n
(1)
(n+1) to (8,192-(m+1))
(8,192-m)
(2)
to 8,191
8,192
H
H
H
H
L
PAFA
PAFB
H
H
H
L
L
PAEA
PAEB
L
L
H
H
H
EFA
EFB
L
H
H
H
H
IDT72V841
0
1 to n
(1)
(n+1) to (4,096-(m+1))
(4,096-m)
(2)
to 4,095
4,096
8
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
