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PEB2086N 参数 Datasheet PDF下载

PEB2086N图片预览
型号: PEB2086N
PDF下载: 下载PDF文件 查看货源
内容描述: ISDN SubscribernAccess控制器 [ISDN SubscribernAccess Controller]
分类和应用: 数字传输接口电信集成电路电信电路综合业务数字网控制器
文件页数/大小: 320 页 / 1450 K
品牌: INFINEON [ INFINEON TECHNOLOGIES AG ]
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Functional Description
Before starting a transmission, the microprocessor should verify that the transmitter is inactive,
i.e. that a possible previous transmission has been terminated. This is indicated by a "0" in the
MONITOR Channel Active MAC status bit.
After having written the MONITOR Data Transmit (MOX) register, the microprocessor sets the
MONITOR Transmit Control bit MXC to "1". This enables the MX bit to go active (0), indicating
the presence of valid MONITOR data (contents of MOX) in the corresponding frame. As a
result, the receiving device stores the MONITOR byte in its MONITOR Receive MOR register
and generates an MDR interrupt status.
Alerted by the MDR interrupt, the microprocessor reads the MONITOR Receive (MOR)
register. When it is ready to accept data (e.g. based on the value in MOR, which in a point-to-
multipoint application might be the address of the destination device), it sets the MR control bit
MRC to "1" to enable the receiver to store succeeding MONITOR channel bytes and
acknowledge them according to the MONITOR channel protocol. In addition, it enables other
MONITOR channel interrupts by setting MONITOR Interrupt Enable to "1".
As a result, the first MONITOR byte is acknowledged by the receiving device setting the MR
bit to "0". This causes a MONITOR Data Acknowledge MDA interrupt status at the transmitter.
A new MONITOR data byte can now be written by the microprocessor in MOX. The MX bit is
still in the active (0) state. The transmitter indicates a new byte in the MONITOR channel by
returning the MX bit active after sending it once in the inactive state. As a result, the receiver
stores the MONITOR byte in MOR and generates a new MDR interrupt status. When the
microprocessor has read the MOR register, the receiver acknowledges the data by returning
the MR bit active after sending it once in the inactive state. This in turn causes the transmitter
to generate an MDA interrupt status.
This "MDA interrupt – write data – MDR interrupt – read data – MDA interrupt" handshake is
repeated as long as the transmitter has data to send. Note that the MONITOR channel protocol
imposes no maximum reaction times to the microprocessor.
When the last byte has been acknowledged by the receiver (MDA interrupt status), the
microprocessor sets the MONITOR Transmit Control bit MXC to "0". This enforces an inactive
("1") state in the MX bit. Two frames of MX inactive signifies the end of a message. Thus, a
MONITOR Channel End of Reception MER interrupt status is generated by the receiver when
the MX bit is received in the inactive state in two consecutive frames. As a result, the
microprocessor sets the MR control bit MRC to 0, which in turn enforces an inactive state in
the MR bit. This marks the end of the transmission, making the MONITOR Channel Active
MAC bit return to "0".
During a transmission process, it is possible for the receiver to ask a transmission to be
aborted by sending an inactive MR bit value in two consecutive frames. This is effected by the
microprocessor writing the MR control bit MRC to "0". An aborted transmission is indicated by
a MONITOR Channel Data Abort MAB interrupt status at the transmitter.
2.4.5
C/I Channel Handling
The Command/Indication channel carries real-time status information between the ISAC-S
and another device connected to the IOM.
1) One C/I channel (called C/I0) conveys the commands and indications between the layer-1
and the layer-2 parts of the ISAC-S. This channel is available in all timing modes (TE and
Semiconductor Group
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