ADVANCE
512Mb: x4, x8, x16
DDR SDRAM
FUNCTIONAL BLOCK DIAGRAM
128 Meg x 4
CKE
CK#
CK
CS#
WE#
CAS#
RAS#
CONTROL
LOGIC
BANK3
BANK2
BANK1
COMMAND
DECODE
MODE REGISTERS
REFRESH 13
COUNTER
13
13
ROW-
ADDRESS
MUX
13
BANK0
ROW-
ADDRESS
LATCH
&
DECODER
8192
BANK0
MEMORY
ARRAY
(8,192 x 2,048 x 8)
4
8
READ
LATCH
MUX
4
DQS
GENERATOR
COL0
4
CK
DATA
DLL
SENSE AMPLIFIERS
16,384
DRVRS
1
DQ0 -
DQ3, DM
DQS
DQS
1
1
1
2
4
8
4
DATA
4
4
4
RCVRS
1
2
I/O GATING
DM MASK LOGIC
BANK
CONTROL
LOGIC
8
1
MASK
WRITE
FIFO
&
DRIVERS
ck
out
ck
in
INPUT
REGISTERS
A0-A12,
BA0, BA1
15
ADDRESS
REGISTER
2
2048
(x8)
8
COLUMN
DECODER
COLUMN-
ADDRESS
COUNTER/
LATCH
11
12
CK
COL0
1
1
512Mb: x4, x8, x16 DDR SDRAM
512Mx4x8x16DDR_B.p65 – Rev. B; Pub 4/01
4
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©2001, Micron Technology, Inc.