PRELIMINARY
1Gb: x4, x8, x16
DDR SDRAM
Figure 12: Consecutive READ Bursts
T0
CK#
CK
COMMAND
ADDRESS
READ
Bank,
Col
n
NOP
READ
Bank,
Col
b
NOP
NOP
NOP
T1
T2
T2n
T3
T3n
T4
T4n
T5
T5n
CL = 2
DQS
DQ
T0
CK#
CK
COMMAND
ADDRESS
READ
Bank,
Col
n
NOP
READ
Bank,
Col
b
NOP
NOP
NOP
DO
n
DO
b
T1
T2
T2n
T3
T3n
T4
T4n
T5
T5n
CL = 2.5
DQS
DQ
DO
n
DO
b
DON’T CARE
NOTE:
TRANSITIONING DATA
1. DO
n
(or
b)
= data-out from column
n
(or column
b).
2.
3.
4.
5.
6.
Burst length = 4 or 8 (if 4, the bursts are concatenated; if 8, the second burst interrupts the first).
Three subsequent elements of data-out appear in the programmed order following DO
n.
Three (or seven) subsequent elements of data-out appear in the programmed order following DO
b.
Shown with nominal
t
AC,
t
DQSCK, and
t
DQSQ.
Example applies only when READ commands are issued to same device.
09005aef8076894f
1gbDDRx4x8x16_2.fm - Rev. A 3/03 EN
22
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology. Inc.
MICRON [ MICRON TECHNOLOGY ]
