PRELIMINARY
1Gb: x4, x8, x16
DDR SDRAM
Figure 16: READ to WRITE
T0
CK#
CK
COMMAND
ADDRESS
READ
Bank,
Col
n
BST
7
NOP
WRITE
Bank,
Col
b
NOP
NOP
T1
T2
T2n
T3
T4
T4n
T5
T5n
CL = 2
DQS
DQ
DM
T0
CK#
CK
COMMAND
ADDRESS
READ
Bank
a,
Col
n
BST
7
NOP
DO
n
tDQSS
(NOM)
DI
b
T1
T2
T2n
T3
T4
T5
T5n
NOP
WRITE
NOP
CL = 2.5
DQS
DQ
DM
DO
n
tDQSS
(NOM)
DI
b
DON’T CARE
NOTE:
TRANSITIONING DATA
1. DO
n
= data-out from column
n.
2.
3.
4.
5.
6.
7.
DI
b
= data-in from column
b.
Burst length = 4 in the cases shown (applies for bursts of 8 as well; if the burst length is 2, the BST command shown can be NOP).
One subsequent element of data-out appears in the programmed order following DO
n.
Data-in elements are applied following DI
b
in the programmed order.
Shown with nominal
t
AC,
t
DQSCK, and
t
DQSQ.
BST = BURST TERMINATE command, page remains open.
09005aef8076894f
1gbDDRx4x8x16_2.fm - Rev. A 3/03 EN
26
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology. Inc.
MICRON [ MICRON TECHNOLOGY ]
