1/2-INCH VGA (WITH FREEZE-FRAME) CMOS
ACTIVE-PIXEL DIGITAL IMAGE SENSOR
Figure 12: Slave Mode Block Diagram
TX_N
PG_N
RESMEM
CLEAR
Row Counter
(1 to 502 MAX)
Row Driver
Pixel Array
ROW_STRT
Row Sequencer
(1 to 671)
Column
Processing
Circuitry
(PGA, ADC)
SYSCLK
LD_SHFT_N
CLEAR
Column Counter
(1 to 667 MAX)
667 x a10
Output SRAM (x2)
Output(9:0)
FRAME_SYNC_N
Two-Wire
Serial
Interface
Reg14
CLEAR
Simultaneous Slave Mode
There are two possible operation methods for slave
mode: simultaneous slave and sequential slave mode.
The method of operation selected is determined by the
means in which the user supplies the control signals.
In simultaneous slave mode the exposure period
occurs during readout. The row and frame synchroni-
zation waveforms are shown in Figures 13 and 14,
respectively. This is the fastest mode of operation since
the exposure and readout are happening in parallel
rather than sequentially. The PG_N, TX_N, and RES-
MEM pulses should have a minimum duration of 338
clock cycles and be applied between the 100th and
600th clocks of a given row.
09005aef80c07280
MT9V403_DS.fm - Rev. B 1/04 EN
9
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology. Inc.
MICRON [ MICRON TECHNOLOGY ]
