MT9V403C12STM 参数 Datasheet PDF下载

1/2-INCH VGA (WITH FREEZE-FRAME) CMOS

ACTIVE-PIXEL DIGITAL IMAGE SENSOR

Table 3:

Determination of Frame Timing

EXPOSURE TIME > READOUT TIME

No Blanking

With Vertical Blanking

NOTE:

N = number of rows in image

RT = row time

VB = vertical blanking rows (255 rows maximum); set in register 6

HB = horizontal blanking in SYSCLK cycles (255 maximum); set forth in register 6

Frame Time = Exposure Time

Frame Time = Exposure Time + VB

READOUT TIME > EXPOSURE TIME

Frame Time = N x RT

Frame Time = (N + VB) x RT

Simultaneous Master Mode

There are two possible operation methods for mas-

ter mode: simultaneous master mode and sequential

master mode. One of these operation modes must be

selected via the two-wire serial interface. In simulta-

neous master mode the exposure period occurs during

readout. The frame synchronization waveforms are

shown in Figure 6 and Figure 7. This is the fastest

mode of operation since the exposure and readout are

happening in parallel rather than sequentially. Please

note that with this speed optimized timing the first row

readout is the last row of the previous frame that is still

in the row memory.

Figure 6: Simultaneous Master Mode Frame Synchronization Waveforms

readout time > exposure time

EXPOSE

(output)

FRAME_VALID

(output)

ROW_VALID

(output)

DATA [9:0]

(output)

NOTE:

Vertical blanking is nominally 1 SYSCLK and 0 row times, and may be increased by using register 6.

XXX

Row Row

1

2

((

))

((

))

((

))

((

))

((

))

((

))

Exposure Time

((

))

((

))

Vertical Blanking

((

))

((

))

XXX

((

))

Row Row

N-1 N

((

))

((

))

XXX

((

))

Row Row Row XXX Row Row Row

481

1

2

478 479 480

((

))

((

))

XXX

((

))

Row Row

N-1 N

((

))

((

))

XXX

((

))

Row Row Row

478 479 480

Figure 7: Simultaneous Master Mode Frame Synchronization Waveforms

exposure time > readout time

EXPOSE

(output)

FRAME_VALID

(output)

ROW_VALID

(output)

DATA [9:0]

(output)

XXX

Row Row

1

2

((

))

Exposure Time

((

))

Vertical Blanking

((

))

((

))

((

))

((

))

((

))

Row

Row Row

478

479 480

XXX

((

))

((

))

((

))

Row Row Row

1

2

481

((

))

((

))

Row Row Row

478 479 480

NOTE:

Vertical blanking is nominally 1 SYSCLK and 0 row times, and may be increased by using register 6.

09005aef80c07280

MT9V403_DS.fm - Rev. B 1/04 EN

6

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©2004 Micron Technology. Inc.