256Mb and 512Mb (256Mb/256Mb), P30-65nm
Erase Operations
Erase Operations
BLOCK ERASE Command
ERASE operations are performed on a block basis. An entire block is erased each time a
BLOCK ERASE command sequence is issued, and only one block is erased at a time.
When a block is erased, each bit within that block reads as a logical 1.
A BLOCK ERASE operation is initiated by writing the BLOCK ERASE SETUP command
to the address of the block to be erased, followed by the BLOCK ERASE CONFIRM com-
mand. If the device is placed in standby (CE# de-asserted) during a BLOCK ERASE oper-
ation, the device completes the operation before entering standby. The V
PP
value must
be above V
PPLK
and the block must be unlocked.
During a BLOCK ERASE operation, the device executes a sequence of internally-timed
events that conditions, erases, and verifies all bits within the block. Erasing the array
changes the value in each cell from a 1 to a 0. Memory block array cells that with a value
of 1 can be changed to 0 only by programming the block.
The status register can be examined for block erase progress and errors by reading any
address. The device remains in the read status register state until another command is
written. SR0 indicates whether the addressed block is erasing. SR7 is set upon erase
completion.
SR7 indicates block erase status while the sequence executes. When the BLOCK ERASE
operation has completed, SR5 = 1 (set) indicates an erase failure. SR3 = 1 indicates that
the device could not perform the BLOCK ERASE operation because V
PP
was outside of
its acceptable limits. SR1 = 1 indicates that the BLOCK ERASE operation attempted to
erase a locked block, causing the operation to abort.
Before issuing a new command, the status register contents should be examined and
then cleared using the CLEAR STATUS REGISTER command. Any valid command can
follow after the BLOCK ERASE operation has completed.
The BLOCK ERASE operation is aborted by performing a reset or powering down the
device. In either case, data integrity cannot be ensured, and it is recommended to erase
again the blocks aborted.
BLANK CHECK Command
The BLANK CHECK operation determines whether a specified main block is blank; that
is, completely erased. Other than a BLANK CHECK operation, only a BLOCK ERASE op-
eration can ensure a block is completely erased. BLANK CHECK is especially useful
when a BLOCK ERASE operation is interrupted by a power loss event.
A BLANK CHECK operation can apply to only one block at a time. The only operation
allowed simultaneously is a READ STATUS REGISTER operation. SUSPEND and RE-
SUME operations and a BLANK CHECK operation are mutually exclusive.
A BLANK CHECK operation is initiated by writing the BLANK CHECK SETUP command
to the block address, followed by the CHECK CONFIRM command. When a successful
command sequence is entered, the device automatically enters the read status state.
The device then reads the entire specified block and determines whether any bit in the
block is programmed or over-erased.
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. C 12/13 EN
39
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