MITSUBISHI
〈DIGITAL
ASSP〉
M66256FP
5120
×
8-BIT LINE MEMORY (FIFO)
TEST CIRCUIT
V
CC
R
L
=1kΩ
Q
n
SW1
C
L
=30pF : t
AC
, t
OH
Q
n
SW2
C
L
=5pF : t
OEN
, t
ODIS
R
L
=1kΩ
Input pulse level
:
Input pulse rise/fall time :
Decision voltage input :
Decision voltage output :
0 ~ 3V
3ns
1.3V
1.3V (However, t
ODIS(LZ)
is 10% of output amplitude and t
ODIS(HZ)
is 90% of
that for decision).
The load capacitance C
L
includes the floating capacitance of connection and the input capacitance of
probe.
Parameter
t
ODIS(LZ)
t
ODIS(HZ)
t
OEN(ZL)
t
OEN(ZH)
SW1
Closed
Open
Closed
Open
SW2
Open
Closed
Open
Closed
t
ODIS
/t
OEN
TEST CONDITION
3V
RCK
1.3V
1.3V
GND
3V
RE
GND
t
ODIS(HZ)
t
OEN(ZH)
V
OH
1.3V
Q
n
90%
t
ODIS(LZ)
t
OEN(ZL)
Q
n
1.3V
10%
V
OL
4