MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21869/-A
TRANSFER-MOLD TYPE
INSULATED TYPE
[C] Under-Voltage Protection (Upper-arm, UV
DB
)
c1. Control supply voltage rises : After the voltage reaches UV
DBr
, the circuits start to operate when next input is applied.
c2. Normal operation : IGBT ON and carrying current.
c3. Under voltage trip (UV
DBt
).
c4. IGBT OFF in spite of control input condition, but there is no F
O
signal output.
c5. Under voltage reset (UV
DBr
).
c6. Normal operation : IGBT ON and carrying current.
Control input
Protection circuit state
UV
DBr
Control supply voltage V
DB
RESET
SET
RESET
c1
UV
DBt
c5
c3
c4
c6
c2
Output current Ic
High-level (no fault output)
Error output Fo
Fig. 6 RECOMMENDED CPU I/O INTERFACE CIRCUIT
5V line
10kΩ
DIP-IPM
U
P
,V
P
,W
P
,U
N
,V
N
,W
N
CPU
Fo
V
NC
(Logic)
Note :
RC coupling at each input (parts shown dotted) may change depending on the PWM control scheme used in
the application and the wiring impedance of the application’s printed circuit board.
The DIP-IPM input signal section integrates a 2.5kΩ(min) pull-down resistor. Therefore, when using a external
filtering resistor, care must be taken to satisfy the turn-on threshold voltage requirement.
2.5kΩ (min)
Fig. 7 RECOMMENDED WIRING OF SHUNT RESISTANCE
Wiring inductance should be less than 10nH.
DIP-IPM
width=3mm, thickness=100µm, length=17mm
in copper pattern (rough standard)
Shunt resistor
V
NC
N
Please make the connection point
as close as possible to the terminal
of shunt resistor.
Jul. 2003
MITSUBISHI [ MITSUBISHI ELECTRIC SEMICONDUCTOR ]
