MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21869/-A
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 8 TYPICAL DIP-IPM APPLICATION CIRCUIT EXAMPLE
C1:Tight tolerance temp-compensated electrolytic type
C2,C3: 0.22~2µF R-category ceramic capacitor for noise filtering.
(Note: The capacitance value depends on the PWM control used in the applied system.)
C2
C1
V
UFB
V
UFS
V
P1
HVIC1
V
CC
V
B
HO
V
S
DIP-IPM
P
C3
U
P
IN
COM
U
C2
C1
V
VFB
V
VFS
V
P1
HVIC2
V
CC
IN
COM
V
B
HO
V
S
C3
V
P
V
C2
C1
V
WFB
V
WFS
V
P1
HVIC3
V
CC
V
B
HO
V
S
M
C3
Note 1 :
To prevent the input signals oscillation, the wiring of each input should be as short as possible. (2cm~3cm or less)
2 :
By virtue of integrating an application specific type HVIC inside the module, direct coupling to CPU terminals without any opto-coupler
or transformer isolation is possible.
3 :
F
O
output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately
10kΩ resistor.
4 :
F
O
output pulse width is determined by the external capacitor between CFO and V
NC
terminals (C
FO
). (Example : C
FO
= 22 nF
→
t
FO
= 1.8 ms (typ.))
5 :
The logic of input signal is high-active. The DIP-IPM input signal section integrates a 2.5kΩ (min) pull-down resistor. Therefore, when
using external filtering resistor, care must be taken to satisfy the turn-on threshold voltage requirement.
6 :
To prevent malfunction of protection, The wiring of A, B, C should be as short as possible.
7 :
Please set the R
1
C
5
time constant in the range 1.5~2µs.
8 :
Each capacitor should be located as nearby the pins of the DIP-IPM as possible.
9 :
To prevent surge destruction, the wiring between the smoothing capacitor and the P&N1 pins should be as short as possible. Approxi-
mately a 0.1~0.22µF snubber capacitor between the P&N1 pins is recommended.
CPU UNIT
5V line
15V line
W
P
IN
V
PC
COM
W
LVIC
U
OUT
V
N1
V
CC
C3
V
OUT
U
N
V
N
W
N
Fo
V
NC
U
N
V
N
W
N
F
o
GND
V
NO
CIN
CFO
W
OUT
Too long wiring here might
cause short-circuit.
N
C
CFO
C4(C
FO
)
C5
CIN
B
R1
Shunt
Resistance
A
Long GND wiring here might generate
noise to input and cause IGBT
malfunction.
If this wiring is too long, the SC level
fluctuation might be larger and cause
SC malfunction.
N1
Jul. 2003
MITSUBISHI [ MITSUBISHI ELECTRIC SEMICONDUCTOR ]
