N04Q16yyC2B
NanoAmp Solutions, Inc.
Functional Block Diagram
Address
Inputs
(A1 - A4)
Advance Information
Word
Address
Decode
Logic
Address
Inputs
(A0, A5 - A17)
Page
Address
Decode
Logic
4Mb
RAM Array
Input/
Output
I/O0 - I/O7
Mux
and
Buffers
I/O8 - I/O15
Word Mux
CE1
CE2
WE
OE
UB
LB
Control
Logic
Functional Description
CE1
H
X
L
L
L
L
CE2
X
L
H
H
H
H
WE
X
X
X
L
H
H
OE
X
X
X
X
3
L
H
UB
1
X
X
H
1
1
1
LB
1
X
X
H
L
L
L
I/O
0
- I/O
151
High Z
High Z
High Z
Data In
Data Out
High Z
MODE
Standby
2
Standby
Standby
Write
3
Read
Active
POWER
Standby
Standby
Standby
Active
Active
Active
1. When UB and LB are in select mode (low), I/O
0
- I/O
15
are affected as shown. When LB only is in the select mode only I/O
0
- I/O
7
are affected as shown. When UB is in the select mode only I/O
8
- I/O
15
are affected as shown.
2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally
isolated from any external influence and disabled from exerting any influence externally.
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
Capacitance
1
Item
Input Capacitance
I/O Capacitance
Symbol
C
IN
C
I/O
Test Condition
V
IN
= 0V, f = 1 MHz, T
A
= 25
o
C
V
IN
= 0V, f = 1 MHz, T
A
= 25
o
C
Min
Max
8
8
Unit
pF
pF
1. These parameters are verified in device characterization and are not 100% tested
Stock No. 23451-B 2/06
The specification is ADVANCE INFORMATION and subject to change without notice.
3
NANOAMP [ NANOAMP SOLUTIONS, INC. ]
