Reset
M25PE40
8
Reset
Driving Reset (Reset) Low while an internal operation is in progress will affect this operation
(write, program or erase cycle) and data may be lost.
All the Lock bits are reset to ‘0’ after a Reset Low pulse.
shows the status of the device after a Reset Low pulse.
Table 12.
Device status after a Reset Low pulse
Conditions:
Reset pulse occurred
While decoding an instruction
(1)
: WREN,
WRDI, RDID, RDSR, READ, RDLR,
Fast_Read, WRLR, PW, PP, PE, SE, BE,
SSE, DP, RDP
Under completion of an Erase or Program
cycle of a PW, PP, PE, SSE, SE, BE
operation
Under completion of a WRSR operation
Device deselected (S High) and in Standby
mode
1.
S remains Low while Reset is Low.
Lock bits status
Internal logic
status
Addressed data
Reset to ‘0’
Same as POR
Not significant
Reset to ‘0’
Equivalent to
POR
Equivalent to
POR (after t
W
)
Same as POR
Addressed data
could be modified
Write is correctly
completed
Not significant
Reset to ‘0’
Reset to ‘0’
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