M36L0T7050T2, M36L0T7050B2
Functional description
3
Functional description
The PSRAM and Flash memory components have separate power supplies but share the
same grounds. They are distinguished by three Chip Enable inputs: E for the Flash
F
memory and E1 and E2 for the PSRAM.
P
P
Recommended operating conditions do not allow more than one device to be active at a
time. The most common example is simultaneous read operations in the Flash memory and
the PSRAM which would result in a data bus contention. Therefore it is recommended to put
the other device in the high impedance state when reading the selected device.
Figure 3.
Functional block diagram
V
V
V
PPF DDQ
DDF
E
F
G
F
A20-A22
A0-A19
W
128 Mbit
Flash
Memory
DQ0-DQ15
F
RP
F
WAIT
WP
F
F
L
K
F
F
V
CCP
E1
P
G
P
W
16 Mbit
PSRAM
P
E2
P
UB
P
LB
P
V
AI10965
SS
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