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M36L0T7050T2ZAQF 参数 Datasheet PDF下载

M36L0T7050T2ZAQF图片预览
型号: M36L0T7050T2ZAQF
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位(多银行,多层次,突发)闪存和32兆(2MB ×16) PSRAM ,多芯片封装 [128 Mbit (Multiple Bank, Multi-Level, Burst) Flash memory and 32 Mbit (2Mb x16) PSRAM, Multi-Chip Package]
分类和应用: 闪存存储内存集成电路静态存储器
文件页数/大小: 22 页 / 443 K
品牌: NUMONYX [ NUMONYX B.V ]
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M36L0T7050T2, M36L0T7050B2  
Functional description  
3
Functional description  
The PSRAM and Flash memory components have separate power supplies but share the  
same grounds. They are distinguished by three Chip Enable inputs: E for the Flash  
F
memory and E1 and E2 for the PSRAM.  
P
P
Recommended operating conditions do not allow more than one device to be active at a  
time. The most common example is simultaneous read operations in the Flash memory and  
the PSRAM which would result in a data bus contention. Therefore it is recommended to put  
the other device in the high impedance state when reading the selected device.  
Figure 3.  
Functional block diagram  
V
V
V
PPF DDQ  
DDF  
E
F
G
F
A20-A22  
A0-A19  
W
128 Mbit  
Flash  
Memory  
DQ0-DQ15  
F
RP  
F
WAIT  
WP  
F
F
L
K
F
F
V
CCP  
E1  
P
G
P
W
16 Mbit  
PSRAM  
P
E2  
P
UB  
P
LB  
P
V
AI10965  
SS  
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