Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
IRFP460
Source-Drain Diode Current, IF (A)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Gate-source voltage, VGS (V)
ID = 20A
Tj = 25 C
200V
VDD = 400 V
300V
PHW20N50E
50
45
40
35
30
25
20
15
10
5
0
0
25
50
75
100
125
Gate charge, QG (nC)
150
175
200
150 C
VGS = 0 V
PHW20N50E
Tj = 25 C
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5
Drain-Source Voltage, VSDS (V)
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); parameter V
DS
Fig.16. Source-Drain diode characteristic.
I
F
= f(V
SDS
); parameter T
j
Switching times, td(on), tr, td(off), tf (ns)
600
PHW20N50E
100
td(off)
Non-repetitive Avalanche current, IAS (A)
500
Tj prior to avalanche = 25 C
400
300
200
100
0
0
5
10
15
20
25
30
Gate resistance, RG (Ohms)
tr, tf
td(on)
1
1E-06
10
VDS
tp
ID
125 C
PHW20N50E
1E-05
1E-04
Avalanche time, tp (s)
1E-03
1E-02
Fig.14. Typical switching times; t
d(on)
, t
r
, t
d(off)
, t
f
= f(R
G
)
Fig.17. Maximum permissible non-repetitive
avalanche current (I
AS
) versus avalanche time (t
p
);
unclamped inductive load
1.15
1.1
1.05
Normalised Drain-source breakdown voltage
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
Maximum Repetitive Avalanche Current, IAR (A)
100
10
1
0.95
0.9
0.85
-100
Tj prior to avalanche = 25 C
125 C
1
PHW20N50E
0.1
1E-06
-50
0
50
Tj, Junction temperature (C)
100
150
1E-05
1E-04
Avalanche time, tp (s)
1E-03
1E-02
Fig.15. Normalised drain-source breakdown voltage;
V
(BR)DSS
/V
(BR)DSS 25 ˚C
= f(T
j
)
Fig.18. Maximum permissible repetitive avalanche
current (I
AR
) versus avalanche time (t
p
)
September 1999
5
Rev 1.000
PHILIPS [ NXP SEMICONDUCTORS ]
