MITSUBISHI SEMICONDUCTOR <Application Specific Intelligent Power Module>
PRE
n.
.
ificatio hange
l spec ct to c
a finaare subje
ot
is is nic limits
e: Th
tr
Notice parame
Som
Y
INAR
LIM
PS12017-A
FLAT-BASE TYPE
INSULATED TYPE
Fig. 4 OUTPUT CURRENT ANALOGUE SIGNALING
LINEARITY
5
Fig. 5 OUTPUT CURRENT ANALOGUE SIGNALING
“DATA HOLD” DEFINITION
V
C
V
C
–
4
min
max
V
C
–
(200%)
V
DH
=15V
V
DL
=5V
T
C
=
–
20
~
100˚C
500µs
0V
3
V
C0
V
CH
(5
µ
s)
V
CH
(505
µ
s)-V
CH
(5
µ
s)
V
CH
(5
µ
s)
V
CH
(505
µ
s)
V
C
(V)
2
V
C
+(200%)
r
CH
=
1
Analogue output signal
data hold range
V
C
+
0
–400 –300 –200 –100
0
100 200 300 400
Note ; Ringing happens around the point where the signal output
voltage changes state from “analogue” to “data hold” due
to test circuit arrangement and instrumentational trouble.
Therefore, the rate of change is measured at a 5
µs
delayed point.
Real load current peak value.(%)(I
c
=I
o
!
2)
Fig. 6 INPUT INTERLOCK OPERATION TIMING CHART
Input signal V
CIN(p)
of each phase upper arm
Input signal V
CIN(n)
of each phase lower arm
0V
0V
Gate signal V
o(p)
of each phase upper arm
(ASIPM internal)
Gate signal V
o(n)
of each phase upper arm
(ASIPM internal)
Error output F
O1
0V
0V
0V
Note : Input interlock protection circuit ; It is operated when the input signals for any upper-arm / lower-arm pair of a phase are simulta-
neously in “LOW” level.
By this interlocking, both upper and lower IGBTs of this mal-triggered phase are cut off, and “F
O
” signal is outputted. After an “input
interlock” operation the circuit is latched. The “F
O
” is reset by the high-to-low going edge of either an upper-leg, or a lower-leg input,
whichever comes in later.
Fig. 7 TIMING CHART AND SHORT CIRCUIT PROTECTION OPERATION
Input signal V
CIN
of each phase
upper arm
Short circuit sensing signal V
S
0V
0V
S
C
delay time
Gate signal Vo of each phase
upper arm(ASIPM internal)
Error output F
O1
0V
0V
Note : Shor t circuit protection operation. The protection operates with “F
O
” flag and reset on a pulse-by-pulse scheme. The protection by
gate shutdown is given only to the IGBT that senses an overload (excluding the IGBT for the “Brake”).
Jan. 2000
POWEREX [ POWEREX POWER SEMICONDUCTORS ]
