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PCS2I5T915AG 参数 Datasheet PDF下载

PCS2I5T915AG图片预览
型号: PCS2I5T915AG
PDF下载: 下载PDF文件 查看货源
内容描述: 低电压( 2.5V )高精度1 : 5时钟扇出缓冲器 [Low Voltage (2.5V) High Accuracy 1:5 Clock Fan-Out Buffer]
分类和应用: 时钟驱动器逻辑集成电路光电二极管
文件页数/大小: 23 页 / 793 K
品牌: PULSECORE [ PulseCore Semiconductor ]
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September 2006
rev 0.2
Power Supply Characteristics for eHSTL Outputs
1
Symbol Parameter
Test Conditions
2
I
DDQ
I
DDQQ
I
DDD
I
DDDQ
I
TOT
I
TOTQ
Quiescent V
DD
Power
Supply Current
Quiescent V
DDQ
Power
Supply Current
Dynamic V
DD
Power Supply
Current per Output
Dynamic V
DDQ
Power
Supply
Current per Output
Total Power V
DD
Supply
Current
Total Power V
DDQ
Supply
Current
V
DDQ
= Max., Reference Clock = LOW
Outputs enabled, All outputs unloaded
V
DDQ
= Max., Reference Clock = LOW
3
Outputs enabled, All outputs unloaded
V
DD
= Max., V
DDQ
= Max., C
L
= 0pF
V
DD
= Max., V
DDQ
= Max., C
L
= 0pF
V
DDQ
= 1.8V, F
REFERENCE
V
DDQ
= 1.8V, F
REFERENCE
V
DDQ
= 1.8V, F
REFERENCE
V
DDQ
= 1.8V, F
REFERENCE
100MHz, C
L
= 15pF
CLOCK
= 250MHz, C
L
= 15pF
100MHz, C
L
= 15pF
CLOCK
= 250MHz, C
L
= 15pF
CLOCK
=
CLOCK
=
3
PCS2P5T915A
Typ
20
0.1
20
40
20
35
40
80
Max
30
0.3
30
60
40
50
80
160
Unit
mA
mA
µA/MHz
µA/MHz
mA
mA
Notes:
1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations.
2. The termination resistors are excluded from these measurements.
3. If the differential input interface is used, the true input is held LOW and the complementary input is held HIGH.
Differential Input AC Test Conditions for eHSTL
Symbol
Parameter
V
DIF
V
X
V
THI
t
R
, t
F
Input Signal Swing
1
2
Value
1
900
Crossing Point
1
Units
V
mV
V
V/nS
Differential Input Signal Crossing Point
Input Signal Edge Rate
4
Input Timing Measurement Reference Level
3
Notes: 1. The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant
devices must meet the V
DIF
(AC) specification under actual use conditions.
2. A 900mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices
must meet the V
X
specification under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/nS or greater is to be maintained in the 20% to 80% range of the input waveform.
DC Electrical Characteristics Over Operating Range for LVEPECL
1
Symbol
Parameter
Test Conditions
Input Characteristics
I
IH
I
IL
V
IK
V
IN
V
CM
V
REF
V
IH
V
IL
Input HIGH Current
6
Input LOW Current
6
Clamp Diode Voltage
DC Input Voltage
DC Common Mode Input
Voltage
3,5
Single-Ended Reference
4,5
Voltage
DC Input HIGH
DC Input LOW
V
DD
= 2.6V
V
DD
= 2.6V
V
I
= V
DDQ
/GND
V
I
= GND/V
DDQ
Min
Typ
2
Max
±5
±5
Unit
µA
V
V
mV
mV
V
DD
= 2.4V, I
IN
= -18mA
- 0.3
915
-0.7
1082
1082
1275
555
- 1.2
3.6
1248
1620
875
mV
mV
Notes:
1. See RECOMMENDED OPERATING RANGE table.
2. Typical values are at V
DD
= 2.5V, +25°C ambient.
3. V
CM
specifies the maximum allowable range of (V
TR
+ V
CP
) /2. Differential mode only.
4. For single-ended operation while in differential mode, A/V
REF
is tied to the DC Voltage V
REF
.
5. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. The correct input
interface table should be referenced.
6. For differential mode (RxS = LOW), A and A/V
REF
must be at the opposite rail.
Low Voltage (2.5V) High Accuracy 1:5 Clock Fan-Out Buffer
Notice: The information in this document is subject to change without notice.
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