September 2006
rev 0.2
Differential Input AC Test Conditions for HSTL
Symbol
Parameter
V
DIF
V
X
V
THI
t
R
, t
F
Input Signal Swing
1
Differential Input Signal Crossing Point
Input Signal Edge Rate
4
2
3
PCS2P5T915A
Value
1
750
Crossing Point
1
Units
V
mV
V
V/nS
Input Timing Measurement Reference Level
Notes:
1. The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment.
Compliant devices must meet the V
DIF
(AC) specification under actual use conditions.
2. A 750mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices
must meet the V
X
specification under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/nS or greater is to be maintained in the 20% to 80% range of the input waveform.
DC Electrical Characteristics Over Operating Range for eHSTL
1
Symbol
Parameter
Test Conditions
Input Characteristics
I
IH
I
IL
V
IK
V
IN
V
DIF
V
CM
V
IH
V
IL
V
REF
Input HIGH Current
9
Input LOW Current
9
Clamp Diode Voltage
DC Input Voltage
DC Differential Voltage
DC Common Mode Input
Voltage
3,8
DC Input HIGH
4,5,8
DC Input LOW
Single-Ended Reference
4,8
Voltage
I
OH
= -8mA
I
OH
= -100µA
I
OL
= 8mA
I
OL
= 100µA
4,6,8
2,8
Min
Typ
7
Max
±5
±5
Unit
µA
V
V
V
mV
mV
mV
mV
V
DD
= 2.6V
V
DD
= 2.6V
V
I
= V
DDQ
/GND
V
I
= GND/V
DDQ
- 0.7
-0.3
0.2
800
V
REF
+ 100
900
V
DD
= 2.4V, I
IN
= -18mA
- 1.2
+3.6
1000
V
REF
- 100
900
Output Characteristics
V
OH
V
OL
Output HIGH Voltage
Output LOW Voltage
V
DDQ
- 0.4
V
DDQ
- 0.1
0.4
0.1
V
V
V
V
Notes: 1. See RECOMMENDED OPERATING RANGE table.
2. V
DIF
specifies the minimum input differential voltage (V
TR
- V
CP
) required for switching where V
TR
is the "true" input level and V
CP
is the "complement"
input level. Differential mode only. The DC differential voltage must be maintained to guarantee retaining the existing HIGH or LOW input. The AC
differential voltage must be achieved to guarantee switching to a new state.
3. V
CM
specifies the maximum allowable range of (V
TR
+ V
CP
) /2. Differential mode only.
4. For single-ended operation, in a differential mode, A/V
REF
is tied to the DC voltage V
REF
.
5. Voltage required to maintain a logic HIGH, single-ended operation in differential mode.
6. Voltage required to maintain a logic LOW, single-ended operation in differential mode.
7. Typical values are at V
DD
= 2.5V, V
DDQ
= 1.8V, +25°C ambient.
8. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. The correct input
interface table should be referenced.
9. For differential mode (RxS = LOW), A and A/V
REF
must be at the opposite rail.
Low Voltage (2.5V) High Accuracy 1:5 Clock Fan-Out Buffer
Notice: The information in this document is subject to change without notice.
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PULSECORE [ PulseCore Semiconductor ]
