September 2006
rev 0.2
Differential Input AC Test Conditions for LVEPECL
Symbol
Parameter
V
DIF
V
X
V
THI
t
R
, t
F
Input Signal Swing
1
Differential Input Signal Crossing Point
2
Input Timing Measurement Reference Level
3
Input Signal Edge Rate
4
PCS2P5T915A
Value
732
1082
Crossing Point
1
Units
mV
mV
V
V/nS
Notes:
1. The 732mV peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment.
Compliant devices must meet the V
DIF
(AC) specification under actual use conditions.
2. A 1082mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant
devices must meet the V
X
specification under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/nS or greater is to be maintained in the 20% to 80% range of the input waveform.
DC Electrical Characteristics Over Operating Range for 2.5V LVTTL
1
Symbol
I
IH
I
IL
V
IK
V
IN
V
IH
V
IL
V
DIF
V
CM
V
IH
V
IL
V
REF
Parameter
Input HIGH Current
10
Input LOW Current
DC Input Voltage
2
10
Test Conditions
V
DD
= 2.6V
V
DD
= 2.6V
V
I
= V
DDQ
/GND
V
I
= GND/V
DDQ
Min
Typ
8
Max
±5
±5
Unit
Input Characteristics
µA
V
V
V
V
V
1250
1350
V
REF
- 100
1250
mV
mV
mV
mV
Clamp Diode Voltage
V
DD
= 2.4V, I
IN
= -18mA
-0.3
1.7
- 0.7
- 1.2
+3.6
Single-Ended Inputs
DC Input HIGH
DC Input LOW
DC Differential Voltage
3,9
DC Common Mode Input
Voltage
4,9
DC Input HIGH
5,6,9
DC Input LOW
5,7,9
Single-Ended Reference
Voltage
5,9
I
OH
= -12mA
I
OH
= -100µA
I
OL
= 12mA
I
OL
= 100µA
0.7
0.2
1150
V
REF
+ 100
Differential Inputs
Output Characteristics
V
OH
V
OL
Output HIGH Voltage
Output LOW Voltage
V
DDQ
- 0.4
V
DDQ
- 0.1
0.4
0.1
V
V
V
V
Notes:
1. See RECOMMENDED OPERATING RANGE table.
2. For 2.5V LVTTL single-ended operation, the RxS pin is tied HIGH and A/V
REF
is tied to GND.
3. V
DIF
specifies the minimum input differential voltage (V
TR
- V
CP
) required for switching where V
TR
is the "true" input level and V
CP
is the
"complement" input level. Differential mode only. The DC differential voltage must be maintained to guarantee retaining the existing HIGH or LOW
input. The AC differential voltage must be achieved to guarantee switching to a new state.
4. V
CM
specifies the maximum allowable range of (V
TR
+ V
CP
) /2. Differential mode only.
5. For single-ended operation, in differential mode, A/V
REF
is tied to the DC voltage V
REF
.
6. Voltage required to maintain a logic HIGH, single-ended operation in differential mode.
7. Voltage required to maintain a logic LOW, single-ended operation in differential mode.
8. Typical values are at V
DD
= 2.5V, V
DDQ
= V
DD
, +25°C ambient.
9. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. The correct input
interface table should be referenced.
10. For differential mode (RxS = LOW), A and A/V
REF
must be at the opposite rail.
Low Voltage (2.5V) High Accuracy 1:5 Clock Fan-Out Buffer
Notice: The information in this document is subject to change without notice.
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PULSECORE [ PulseCore Semiconductor ]
