September 2006
rev 0.2
DC Electrical Characteristics Over Operating Range for HSTL
1
Symbol
I
IH
I
IL
V
IK
V
IN
V
DIF
V
CM
V
IH
V
IL
V
REF
PCS2P5T915A
Parameter
Test Conditions
V
DD
= 2.6V
V
DD
= 2.6V
V
I
= V
DDQ
/GND
V
I
= GND/V
DDQ
-0.7
-0.3
2,8
Min
Typ
7
Max
±5
±5
- 1.2
+3.6
Unit
Input Characteristics
Input HIGH Current
9
Input LOW Current
9
Clamp Diode Voltage
DC Input Voltage
DC Differential Voltage
DC Common Mode Input
3,8
Voltage
DC Input HIGH
4,5,8
DC Input LOW
4,6,8
Single-Ended Reference
Voltage
4,8
I
OH
= -8mA
I
OH
= -100µA
I
OL
= 8mA
I
OL
= 100µA
V
DDQ
- 0.4
V
DDQ
- 0.1
0.4
0.1
µA
V
V
V
750
900
V
REF
- 100
750
mV
mV
mV
mV
V
DD
= 2.4V, I
IN
= - 18mA
0.2
680
V
REF
+ 100
Output Characteristics
V
OH
V
OL
Output HIGH Voltage
Output LOW Voltage
V
V
V
V
Notes: 1. See RECOMMENDED OPERATING RANGE table.
2. V
DIF
specifies the minimum input differential voltage (V
TR
- V
CP
) required for switching where V
TR
is the "true" input level and V
CP
is the "complement"
input level. Differential mode only. The DC differential voltage must be maintained to guarantee retaining the existing HIGH or LOW input. The AC
differential voltage must be achieved to guarantee switching to a new state.
3. V
CM
specifies the maximum allowable range of (V
TR
+ V
CP
) /2. Differential mode only.
4. For single-ended operation, in differential mode, A/V
REF
is tied to the DC voltage V
REF
.
5. Voltage required to maintain a logic HIGH, single-ended operation in differential mode.
6. Voltage required to maintain a logic LOW, single-ended operation in differential mode.
7. Typical values are at V
DD
= 2.5V, V
DDQ
= 1.5V, +25°C ambient.
8. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. The correct input
interface table should be referenced.
9. For differential mode (RxS = LOW), A and A/V
REF
must be at the opposite rail.
Power Supply Characteristics for HSTL Outputs
1
Symbol
Parameter
Test Conditions
2
I
DDQ
I
DDQQ
I
DDD
Quiescent V
DD
Power
Supply Current
Quiescent V
DDQ
Power
Supply Current
Dynamic V
DD
Power
Supply Current per
Output
Dynamic V
DDQ
Power
Supply Current per
Output
Total Power V
DD
Supply
Current
Total Power V
DDQ
Supply
Current
V
DDQ
= Max., Reference Clock = LOW
Outputs enabled, All outputs unloaded
V
DDQ
= Max., Reference Clock = LOW
3
Outputs enabled, All outputs unloaded
V
DD
= Max., V
DDQ
= Max., C
L
= 0pF
3
Typ
20
0.1
20
Max
30
0.3
30
Unit
mA
mA
µA/MHz
I
DDDQ
I
TOT
I
TOTQ
V
DD
= Max., V
DDQ
= Max., C
L
= 0pF
V
DDQ
= 1.5V, F
REFERENCE CLOCK
= 100MHz,C
L
= 15pF
V
DDQ
= 1.5V, F
REFERENCE CLOCK
= 250MHz, C
L
= 15pF
V
DDQ
= 1.5V, F
REFERENCE CLOCK
= 100MHz, C
L
= 15pF
V
DDQ
= 1.5V, F
REFERENCE CLOCK
= 250MHz, C
L
= 15pF
30
20
35
35
60
50
40
50
70
120
µA/MHz
mA
mA
Note:
1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations.
2. The termination resistors are excluded from these measurements.
3. If the differential input interface is used, the true input is held LOW and the complementary input is held HIGH.
Low Voltage (2.5V) High Accuracy 1:5 Clock Fan-Out Buffer
Notice: The information in this document is subject to change without notice.
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PULSECORE [ PulseCore Semiconductor ]
