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P3C1024L55TI 参数 Datasheet PDF下载

P3C1024L55TI图片预览
型号: P3C1024L55TI
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗128K ×8 CMOS静态RAM [ULTRA LOW POWER 128K x 8 CMOS STATIC RAM]
分类和应用:
文件页数/大小: 10 页 / 114 K
品牌: PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
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P3C1024L
AC CHARACTERISTICS - WRITE CYCLE
(Over Recommended Operating Temperature & Supply Voltage)
Symbol
t
WC
t
CW
t
AW
t
AS
t
WP
t
AH
t
DW
t
DH
t
WZ
t
OW
Parameter
Write Cycle Time
Chip Enable Time
to End of Write
Address Valid to
End of Write
Address Set-up
Time
Write Pulse Width
Address Hold
Time
Data Valid to End
of Write
Data Hold Time
Write Enable to
Output in High Z
Output Active from
End of Write
10
-55
Min
55
40
40
0
40
0
25
0
20
10
Max
Min
70
60
60
0
50
0
30
0
25
-70
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WRITE CYCLE NO. 1 (WE CONTROLLED)
(6)
WE
Notes:
6.
CE
1
and
WE
are LOW and CE
2
is HIGH for WRITE cycle.
7.
OE
is LOW for this WRITE cycle to show twz and tow.
8. If
CE
1
goes HIGH or CE
2
goes LOW simultaneously with
WE
HIGH, the output remains in a high impedance state.
9. Write Cycle Time is measured from the last valid address to the first transitioning address.
Document #
SRAM132
REV OR
Page 5 of 9