P3C1024L
DATA RETENTION
Symbol
V
DR
I
CCDR (1)
t
CDR
t
R
Parameter
V
CC
for Data Retention
Data Retention Current
Chip Deselect to Data
Retention Time
Operating Recovery Time
(2)
Test Conditions
CE
1
≥
V
CC
-0.2V, CE
2
≤
0.2V,
V
IN
≥
V
CC
-0.2V or V
IN
≤
0.2V
V
DR
= 2.0V
See Retention Waveform
0
100
Min
2.0
10
Max
Unit
V
µA
ns
µs
1.
CE
1
≥
V
DR
-0.2V, CE
2
≥
V
DR
-0.2V or CE
2
≤
0.2V; or
CE
1
≤
0.2V, CE
2
- 0.2V; V
IN
≥
V
DR
-0.2V or V
IN
≤
0.2V
2. V
CC
ramp from V
DR
to V
CC
(min) > 100 µs for full device operation.
LOW V
CC
DATA RETENTION WAVEFORM 1 (CE
1
CONTROLLED)
CE
LOW V
CC
DATA RETENTION WAVEFORM 2 (CE
2
CONTROLLED)
Document #
SRAM132
REV OR
Page 7 of 9