Internet Data Sheet
HYB18TC256[80/16]0BF
256-Mbit Double-Data-Rate-Two SDRAM
1.2
Description
All of the control and address inputs are synchronized with a
pair of externally supplied differential clocks. Inputs are
latched at the cross point of differential clocks (CK rising and
CK falling). All I/Os are synchronized with a single ended
DQS or differential DQS-DQS pair in a source synchronous
fashion.
A 15 bit address bus is used to convey row, column and bank
address information in a RAS-CAS multiplexing style.
The DDR2 device operates with a 1.8 V
±
0.1 V power
supply. An Auto-Refresh and Self-Refresh mode is provided
along with various power-saving power-down modes.
The functionality described and the timing specifications
included in this data sheet are for the DLL Enabled mode of
operation.
The DDR2 SDRAM is available in PG-TFBGA package.
The 256-Mb DDR2 DRAM is a high-speed Double-Data-
Rate-Two CMOS DRAM device containing 536,870,912 bits
and internally configured as a quad -bank DRAM. The 256-
Mb device is organized as either 8 Mbit
×8
I/O
×4
banks or 4
Mbit
×16
I/O
×4
banks chip. These devices achieve high
speed transfer rates starting at 400 Mb/sec/pin for general
applications. See
to
for performance figures.
The device is designed to comply with all DDR2 DRAM key
features:
1. Posted CAS with additive latency
2. Write latency = read latency - 1
3. Normal and weak strength data-output driver
4. Off-Chip Driver (OCD) impedance adjustment
5. On-Die Termination (ODT) function
TABLE 5
Ordering Information for Lead-Free Products (RoHS Compliant)
Product Type
1)
HYB18TC256800BF-2.5
HYB18TC256160BF-2.5
HYB18TC256800BF-3
HYB18TC256160BF-3
HYB18TC256800BF-3S
HYB18TC256160BF-3S
HYB18TC256800BF-3.7
HYB18TC256160BF-3.7
HYB18TC256800BF-5
HYB18TC256160BF-5
Org.
×8
×16
×8
×16
×8
×16
×8
×16
×8
×16
3-3-3
200
DDR2-400B
4-4-4
266
DDR2-533C
5-5-5
333
DDR2-667D
4-4-4
333
DDR2-667C
CAS-RCD-RP
Latencies
2)3)4)
6-6-6
Clock
(MHz)
400
Speed
DDR2-800E
Package
PG-TFBGA-60
PG-TFBGA-84
PG-TFBGA-60
PG-TFBGA-84
PG-TFBGA-60
PG-TFBGA-84
PG-TFBGA-60
PG-TFBGA-84
PG-TFBGA-60
PG-TFBGA-84
Note
5)
1) Please check with your Qimonda representative that leadtime and availability of your preferred device type and version meet your project
requirements.
2) CAS: Column Address Strobe
3) RCD: Row Column Delay
4) RP: Row Precharge
5) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
Note: For product nomenclature see
of this data sheet
Rev. 1.3, 2007-05
07182006-DD60-22E6
5
QIMONDA [ QIMONDA AG ]
