Internet Data Sheet
HY[B/I]39S256[40/80/16][0/7]F[E/T/F](L)
256-MBit Synchronous DRAM
HY[B/I]39S256[40/80/16]0FT(L), HY[B/I]39S256[40/80/16]0FE(L), HYB39S256[40/80/16]0FF(L), HYB39S256407FE
Revision History: 2007-09, Rev. 1.42
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Subjects (major changes since last revision)
Adapted internet edition
Corrected SDRAM organization for x4 in Table 4
Editorial Change
Corrected HYB39S256407FF-7 to HYP39S256407FE-7
Corrected HYB39S256400FE-7 to HYB39S256400FF-7
Previous Revision: 2007-09, Rev. 1.41
Previous Revision: 2007-04, Rev. 1.40
Previous Revision: 2007-03, Rev. 1.30
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