S1L9223B01
RF AMP & SERVO SIGNAL PROCESSOR
PIN DESCRIPTION
(Continued)
Pin No.
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
Symbol
FEBIAS
DVEE
PD1
PD2
F
E
PD
LD
VR
VCC
RF-
RFO
IRF
EQO
RFI
EQC
EI
GND
Focus error bias voltage control pin
The DVEE pin for logic circuit
The negative input pin of RF I/V amplifier1(A+C signal)
The negative input pin of RF I/V amplifier2(B+D signal)
The negative input pin of F I/V amplifier (F signal)
The negative input pin of E I/V amplifier (E signal)
The input pin for APC
The output pin for APC
The output pin of (AVEE+AVCC)/2 voltage
VCC for RF part
RF summing amplifier inverting input pin
RF summing amplifier output pin
The input pin for AGC
The output pin for AGC
The input pin for EFM comparison
The capacitor connection pin for AGC
Feedback input pin of E I/V amplifier for EF Balance control
GND for RF part
Description
6