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SI3056SSI1-EVB 参数 Datasheet PDF下载

SI3056SSI1-EVB图片预览
型号: SI3056SSI1-EVB
PDF下载: 下载PDF文件 查看货源
内容描述: 全球串行接口直接访问安排 [GLOBAL SERIAL INTERFACE DIRECT ACCESS ARRANGEMENT]
分类和应用:
文件页数/大小: 94 页 / 1395 K
品牌: SILABS [ SILICON LABORATORIES ]
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Si3056
Si3018/19/10
Table 5. Absolute Maximum Ratings
Parameter
DC Supply Voltage
Input Current, Si3056 Digital Input Pins
Digital Input Voltage
Operating Temperature Range
Storage Temperature Range
Symbol
V
D
I
IN
V
IND
T
A
T
STG
Value
–0.5 to 3.6
±10
–0.3 to (V
D
+ 0.3)
–40 to 100
–65 to 150
Unit
V
mA
V
°C
°C
Note:
Permanent device damage can occur if the above absolute maximum ratings are exceeded. Restrict functional
operation to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum
rating conditions for extended periods might affect device reliability.
Table 6. Switching Characteristics—General Inputs
(V
D
=
3.0 to 3.6 V, T
A
=
0 to 70 °C, C
L
=
20 pF)
Parameter
1
Cycle Time, MCLK
MCLK Duty Cycle
MCLK Jitter Tolerance
Rise Time, MCLK
Fall Time, MCLK
MCLK Before RESET
RESET Pulse Width
2
M0, M Before RESET↑
3
Symbol
t
mc
t
dty
t
jitter
t
r
t
f
t
mr
t
rl
t
mxr
Min
16.67
40
10
250
20
Typ
50
Max
1000
60
±2
5
5
Unit
ns
%
ns
ns
ns
cycles
ns
ns
Notes:
1.
All timing (except Rise and Fall time) is referenced to the 50% level of the waveform. Input test levels are
V
IH
=
V
D
– 0.4 V, V
IL
=
0.4 V. Rise and fall times are referenced to the 20% and 80% levels of the waveform.
2.
The minimum RESET pulse width is the greater of 250 ns or 10 MCLK cycle times.
3.
M0 and M are typically connected to V
D
or GND and should not be changed during normal operation.
t
r
M CLK
t
m r
t
rl
M 0, M1
t
m xr
t
m c
t
f
V
IH
V
IL
RESET
Figure 2. General Inputs Timing Diagram
10
Rev. 1.05