Si5338
Disable Outputs
Set OEB_ALL = 1; reg230[4]
Pause LOL
Set DIS_LOL = 1; reg241[7]
Write new configuration to device
accounting for the write-allowed mask
(See Section 6.1)
Register
Map
Use ClockBuilder
Desktop v2.7 or later
Validate input clock status
NO
Input clocks are
validated with the
LOS alarms. See
Register 218 to
Is input clock valid?
determine which LOS
should be monitored
YES
Configure PLL for locking
Set FCAL_OVRD_EN = 0; reg49[7]
Initiate Locking of PLL
Set SOFT_RESET = 1; reg246[1]
Restart LOL
Set DIS_LOL = 0; reg241[7]
Wait 25 ms
Confirm PLL lock status
NO
PLL is locked when
PLL_LOL, SYS_CAL, and
all other alarms are
cleared
Is PLL locked?
YES
Copy registers as follows:
237[1:0] to 47[1:0]
236[7:0] to 46[7:0]
Copy FCAL values to
active registers
235[7:0] to 45[7:0]
Set 47[7:2] = 000101b
Set PLL to use FCAL values
Set FCAL_OVRD_EN = 1; reg49[7]
Enable Outputs
Set OEB_ALL = 0; reg230[4]
Figure 9. I2C Programming Procedure
Rev. 0.6
21
SILICON [ SILICON ]
