USB3813-1080XY 参数 Datasheet PDF下载

USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications

Datasheet

9.5.2

Reset and Configuration Strap Timing

illustrates the RESET_N timing requirements and its relation to the configuration strap

signals. Assertion of RESET_N is not a requirement. However, if used, it must be asserted for the

minimum period specified.

Refer to

for additional information on resets. Refer to

for additional information on configuration straps.

t

rstia

RESET_N

t

csh

Configuration

Straps

Figure 9.3 RESET_N Configuration Strap Timing

Table 9.6 RESET_N Configuration Strap Timing

SYMBOL

t

rstia

t

csh

DESCRIPTION

RESET_N input assertion time

Configuration strap hold after RESET_N deassertion

MIN

5

1

TYP

MAX

UNITS

us

ms

9.5.3

USB Timing

All device USB signals conform to the voltage, power, and timing characteristics/specifications as set

forth in the

Universal Serial Bus Specification.

Please refer to the

Universal Serial Bus Specification,

Revision 2.0, available at http://www.usb.org.

9.5.4

HSIC Timing

All device HSIC signals conform to the voltage, power, and timing characteristics/specifications as set

forth in the

High-Speed Inter-Chip USB Electrical Specification.

Please refer to the

High-Speed Inter-

Chip USB Electrical Specification,

Version 1.0, available at http://www.usb.org.

9.5.5

SMBus Timing

All device SMBus signals conform to the voltage, power, and timing characteristics/specifications as

set forth in the

System Management Bus Specification.

Please refer to the

System Management Bus

Specification,

Version 1.0, available at http://smbus.org/specs.

9.5.6

I

2

C Timing

All device I

2

C signals conform to the 100KHz Standard Mode (Sm) voltage, power, and timing

characteristics/specifications as set forth in the

I

2

C-Bus Specification.

Please refer to the

I

2

C-Bus

Specification,

available at http://www.nxp.com.

SMSC USB3813

63

Revision 1.0 (06-17-13)

DATASHEET