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S25FL032A0LMFI001 参数 Datasheet PDF下载

S25FL032A0LMFI001图片预览
型号: S25FL032A0LMFI001
PDF下载: 下载PDF文件 查看货源
内容描述: 32兆位CMOS 3.0伏闪存与50MHz的SPI (串行外设接口)总线 [32 Megabit CMOS 3.0 Volt Flash Memory with 50MHz SPI (Serial Peripheral Interface) Bus]
分类和应用: 闪存
文件页数/大小: 36 页 / 944 K
品牌: SPANSION [ SPANSION ]
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D a t a S h e e t ( P r e l i m i n a r y )  
9.4  
Write Enable (WREN)  
The Write Enable (WREN) command (see Figure 9.4) sets the Write Enable Latch (WEL) bit to a 1, which  
enables the device to accept a Write Status Register, program, or erase command. The WEL bit must be set  
prior to every Page Program (PP), Erase (SE or BE) and Write Status Register (WRSR) command.  
The host system must first drive CS# low, write the WREN command, and then drive CS# high.  
Figure 9.4 Write Enable (WREN) Command Sequence  
CS#  
6
5
7
0
1
2
3
4
Mode 3  
SCK  
Mode 0  
Command  
SI  
SO  
Hi-Z  
9.5  
Write Disable (WRDI)  
The Write Disable (WRDI) command (see Figure 9.5) resets the Write Enable Latch (WEL) bit to a 0, which  
disables the device from accepting a Write Status Register, program, or erase command. The host system  
must first drive CS# low, write the WRDI command, and then drive CS# high.  
Any of following conditions resets the WEL bit:  
„ Power-up  
„ Write Disable (WRDI) command completion  
„ Write Status Register (WRSR) command completion  
„ Page Program (PP) command completion  
„ Sector Erase (SE) command completion  
„ Bulk Erase (BE) command completion  
Figure 9.5 Write Disable (WRDI) Command Sequence  
CS#  
0
3
4
7
6
1 2  
5
Mode 3  
SCK  
SI  
Mode 0  
Command  
Hi-Z  
SO  
September 1, 2006 S25FL032A_00_C0  
S25FL032A  
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