D a t a S h e e t ( P r e l i m i n a r y )
9.6
Read Status Register (RDSR)
The Read Status Register (RDSR) command outputs the state of the Status Register bits. Table 9.2 shows
the status register bits and their functions.
The RDSR command may be written at any time, even while a program, erase, or Write Status Register
operation is in progress. The host system should check the Write In Progress (WIP) bit before sending a new
command to the device if an operation is already in progress. Figure 9.6 shows the RDSR command
sequence, which also shows that it is possible to read the Status Register continuously until CS# is driven
high.
Table 9.2 S25FL032A Status Register
Bit
Status Register Bit
Bit Function
Description
1 = Protects when W# is low
7
SRWD
Status Register Write Disable
0 = No protection, even when W# is low
6
5
4
3
2
—
—
—
Not used
Not used
—
BP2
BP1
BP0
000–111 = Protects upper half of address range in 5 sizes. See
Table 7.1.
Block Protect
1 = Device accepts Write Status Register, program, or erase
commands
1
0
WEL
WIP
Write Enable Latch
Write in Progress
0 = Ignores Write Status Register, program, or erase commands
1 = Device Busy. A Write Status Register, program, or erase
operation is in progress
0 = Ready. Device is in standby mode and can accept commands.
Figure 9.6 Read Status Register (RDSR) Command Sequence
CS#
SCK
7
0
2
3
4
5
6
9
11
12 13 14
15
1
8
10
Mode 3
Mode 0
Command
SI
Hi-Z
SO
6
4
2
6
5
7
5
3
1
0
4
2
7
0
7
3
1
MSB
MSB
Status Register Out
Status Register Out
18
S25FL032A
S25FL032A_00_C0 September 1, 2006
SPANSION [ SPANSION ]
