1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39SF010A / SST39SF020A / SST39SF040
Data Sheet
TRC
ADDRESS AMS-0
TAA
CE#
TCE
OE#
VIH
WE#
TOLZ
TOE
TOHZ
TCHZ
HIGH-Z
DATA VALID
1147 F03.1
DQ7-0
HIGH-Z
TCLZ
TOH
DATA VALID
Note: AMS = Most significant address
AMS = A16 for SST39SF010A, A17 for SST39SF020A, and A18 for SST39SF040
FIGURE 4: R
EAD
C
YCLE
T
IMING
D
IAGRAM
INTERNAL PROGRAM OPERATION STARTS
TBP
ADDRESS AMS-0
5555
TAH
TWP
WE#
TAS
OE#
TCH
CE#
TCS
DQ7-0
AA
SW0
55
SW1
A0
SW2
DATA
BYTE
(ADDR/DATA)
TWPH
TDS
2AAA
5555
ADDR
TDH
1147 F04.1
Note: AMS = Most significant address
AMS = A16 for SST39SF010A, A17 for SST39SF020A, and A18 for SST39SF040
FIGURE 5: WE# C
ONTROLLED
P
ROGRAM
C
YCLE
T
IMING
D
IAGRAM
©2003 Silicon Storage Technology, Inc.
S71147-06-000
8/04
10