1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39SF010A / SST39SF020A / SST39SF040
Data Sheet
INTERNAL PROGRAM OPERATION STARTS
TBP
ADDRESS AMS-0
5555
TAH
TCP
CE#
TAS
OE#
TCH
WE#
TCS
DQ7-0
AA
SW0
55
SW1
A0
SW2
DATA
BYTE
(ADDR/DATA)
TCPH
TDS
2AAA
5555
ADDR
TDH
1147 F05.1
Note: AMS = Most significant address
AMS = A16 for SST39SF010A, A17 for SST39SF020A, and A18 for SST39SF040
FIGURE 6: CE# C
ONTROLLED
P
ROGRAM
C
YCLE
T
IMING
D
IAGRAM
ADDRESS AMS-0
TCE
CE#
TOEH
OE#
TOE
WE#
TOES
DQ7
D
D#
D#
D
1147 F06.1
Note: AMS = Most significant address
AMS = A16 for SST39SF010A, A17 for SST39SF020A, and A18 for SST39SF040
FIGURE 7: D
ATA
# P
OLLING
T
IMING
D
IAGRAM
©2003 Silicon Storage Technology, Inc.
S71147-06-000
8/04
11