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UPSD3233 参数 Datasheet PDF下载

UPSD3233图片预览
型号: UPSD3233
PDF下载: 下载PDF文件 查看货源
内容描述: 闪存可编程系统设备与8032微控制器内核 [Flash Programmable System Devices with 8032 Microcontroller Core]
分类和应用: 闪存微控制器
文件页数/大小: 170 页 / 2708 K
品牌: STMICROELECTRONICS [ STMICROELECTRONICS ]
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uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
Port C – Functionality and Structure
Port C can be configured to perform one or more
of the following functions (see Figure
– MCU I/O Mode
– CPLD Output – McellBC7-McellBC0 outputs
can be connected to Port B or Port C.
– CPLD Input – via the Input Macrocells (IMC)
– In-System Programming (ISP) – JTAG pins
(TMS, TCK, TDI, TDO) are dedicated pins for
device programming. (See
for more information
on JTAG programming.)
Figure 66. Port C Structure
DATA OUT
REG.
D
WR
1
OUTPUT
MUX
PORT C PIN
Q
DATA OUT
Open Drain – Port C pins can be configured in
Open Drain Mode
– Battery Backup features – PC2 can be
configured for a battery input supply, Voltage
Stand-by (V
STBY
).
PC4 can be configured as a Battery-on
Indicator (V
BATON
), indicating when V
CC
is
less than V
BAT
.
Port C does not support Address Out Mode, and
therefore no Control Register is required.
SPECIAL FUNCTION
MCELLBC [ 7:0 ]
READ MUX
MCU DATA BUS
P
D
B
DATA IN
OUTPUT
SELECT
ENABLE OUT
DIR REG.
D
WR
ENABLE PRODUCT TERM (.OE)
INPUT
MACROCELL
1
CONFIGURATION
BIT
AI06618
Q
CPLD - INPUT
SPECIAL FUNCTION
Note: 1. ISP or battery back-up
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