SM5964BW44JP 参数 Datasheet PDF下载

SM5964B

8-Bit Micro-controller

64KB with ISP Flash

& 1KB RAM embedded

3.2

Data Memory

The SM5964B has 256B +768B on-chip SRAM. 256B of it are the same as general 8052 internal memory structure

while the expanded 768 Bytes on-chip SRAM can be accessed by external memory addressing method ( by

instruction MOVX). As shown in Fig. 3-2.

02FF

FF

FF

Higher 128 Bytes (Accessed by

indirect addressing mode only)

80

7F

SFR (Accessed by direct addressing

mode only)

80

Expanded 768 Bytes

(Accessed by direct

external addressing mode

by instruction MOVX)

Lower 128 Bytes (Accessed by

direct & indirect addressing mode )

00

0000

Fig. 3-2: RAM architecture

3.3

Data memory - lower 128 byte (00h to 7Fh)

Data memory 00h to FFh is the same as 8052.

The address 00h to 7Fh can be accessed by direct and indirect addressing modes.

Address 00h to 1Fh is register area.

Address 20h to 2Fh is memory bit area.

Address 30h to 7Fh is for general memory area.

3.4

Data memory - higher 128 byte (80h to FFh)

The address 80h to FFh can be accessed by indirect addressing mode.

Address 80h to FFh is data area.

3.5

Data memory - Expanded 768 bytes ($0000 to $02FF)

From external address 0000h to 02FFh is the on-chip expanded SRAM area, total 768 Bytes. This area can be

accessed by external direct addressing mode (by instruction MOVX).

Mnemonic

Description

System

Configuration

Register

Internal RAM

Control Register

Data Bank

Control Register

Dir.

Bit 7

Bit 6

Bit 5

Bit 4

Expanded RAM

-

-

-

-

-

-

PDWU

E

-

-

Bit 3

Bit 2

Bit 1

Bit 0

RST

SCONF

RCON

DBANK

BFh

85h

86h

WDR

-

BSE

-

-

BS3

ISPE

-

BS2

OME

RAMS

1

BS1

ALEI

RAMS

0

BS0

02H

00H

01H

Specifications subject to change without notice contact your sales representatives for the most recent information.

ISSFD-M081

Ver A SM5964B 3/7/2014

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