SM5964B
8-Bit Micro-controller
64KB with ISP Flash
& 1KB RAM embedded
4.
CPU Engine
The SM5964B engine is composed of four components:
(1)
Control unit
(2)
Arithmetic – logic unit
(3)
Memory control unit
(4)
RAM and SFR control unit
The SM5964B engine allows to fetch instruction from program memory and to execute using RAM or SFR. The
following chapter describes the main engine register.
Mnemonic
ACC
B
PSW
SP
DPL
DPH
Description
Accumulator
B register
Program status
word
Stack Pointer
Data pointer low
Data pointer high
Dir.
E0h
F0h
D0h
81h
82h
83h
Bit 7
ACC.7
B.7
CY
Bit 6
Bit 5
8051 Core
ACC.6 ACC.5
B.6
B.5
AC
F0
Bit 4
ACC.4
B.4
Bit 3
ACC.3
B.3
Bit 2
ACC.2
B.2
OV
Bit 1
ACC.1
B.1
PSW.1
Bit 0
ACC.0
B.0
P
RST
00H
00H
00H
07H
00H
00H
RS[1:0]
SP[7:0]
DPL[7:0]
DPH[7:0]
4.1
Accumulator
ACC is the Accumulator register. Most instructions use the accumulator to store the operand.
Mnemonic: ACC
7
6
5
ACC.7 ACC.6 ACC05
Address: E0h
0
Reset
ACC.0
00h
4
ACC.4
3
ACC.3
2
ACC.2
1
ACC.1
ACC[7:0]: The A (or ACC) register is the standard 8052 accumulator.
4.2
B Register
The B register is used during multiply and divide instructions. It can also be used as a scratch pad register to store
temporary data.
Mnemonic: B
7
6
B.7
B.6
Address: F0h
0
Reset
B.0
00h
5
B.5
4
B.4
3
B.3
2
B.2
1
B.1
B[7:0]: The B register is the standard 8052 register that serves as a second accumulator.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M081
Ver A SM5964B 3/7/2014
- 22 -
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
