SM5964B
8-Bit Micro-controller
64KB with ISP Flash
& 1KB RAM embedded
DPTR
{RAMS1,RAMS0,@Ri}
{DBANK[3:0],direct
address}
READ
MUX
A[9:0]
Bank 12-15 (64B x 4)
Bank 8-11 (64B x 4)
768
Bytes
On-chip 768B expanded RAM
Bank 4-7 (64B x 4)
1KB memory Space
WRITE
Bank 0-3 (64B x 4)
Scratchpad RAM
OME
MOVX @Ri instrcution
MOVX @DPTR instrcution
DPTR
{RAMS1,RAMS0}
DBANK[7]
Chip selection of on-chip expanded RAM and Scratchpad RAM
SEL
Control Logic
Fig.3-4: Access on-chip expanded RAM and scratchpad RAM with both in single 1KB addressing space scheme
Mnemonic: DBANK
7
6
BSE
-
Address: 86h
0
Reset
BS0
01H
5
-
4
-
3
BS3
2
BS2
1
BS1
BSE: Set 1 to enable data banking function.
BS[3:0]: One is selected from 16 pieces of 64B data memory bank.
BSE
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
BS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
x
BS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
x
BS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
x
BS0
Mapped window : $40 - $7F
Logically addressed range in 1K memory space
0
$000 – $03F
1
$040 – $07F
0
$080 – $0BF
1
$0C0 – $0FF
0
$100 – $13F
1
$140 – $17F
0
$180 – $1BF
1
$1C0 – $1FF
0
$200 – $23F
1
$240 – $27F
0
$280 – $2BF
1
$2C0 – $2FF
0
$300 – $33F
1
$340 – $37F
0
$380 – $3BF
1
$3C0 – $3FF
x
Mapping is off
Table3-2: Bank mapping address
Physical address
Scratchpad RAM
( $00 – $FF )
Expanded RAM
( $000 – $2FF)
Mapping is off
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M081
Ver A SM5964B 3/7/2014
- 21 -
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
