SM5964BW44JP 参数 Datasheet PDF下载

SM5964B

8-Bit Micro-controller

64KB with ISP Flash

& 1KB RAM embedded

DPTR

{RAMS1,RAMS0,@Ri}

{DBANK[3:0],direct

address}

READ

MUX

A[9:0]

Bank 2 (256B)

Bank 1 (256B)

768

Bytes

Bank 0 (256B)

WRITE

On-chip 768B expanded RAM

OME

MOVX @Ri instrcution

MOVX @DPTR instrcution

DPTR

{RAMS1,RAMS0}

DBANK[7]

SEL

Control Logic

Chip selection of on-chip expanded RAM

Fig. 3-3: Access on-chip expanded RAM scheme

Method 2 : By direct addressing MOV instruction

The 768B on-chip expanded data RAM and 256B scratchpad RAM is combined together to form a 1KB memory

space. This 1KB space is logically partitioned into 16 pieces of 64B RAM bank. This 1KB space can be accessed

through a single-addressing-type MOV instruction with bank-switch technique. In this technique, the 64B address

range $40 - $7F in direct addressing MOV instruction is used as mapping window and is concatenated with bit3 –

bit0 in DBANK register to address up to 1KB memory space.

While accessed by direct addressing MOV instruction, the 768B expanded RAM is address-offset by 256 bytes

upward and concatenates with scratchpad RAM to form a 1KB memory space. Hence 768B expanded RAM

occupies address space from $100 to $2FF and 256B scratchpad RAM is located from $000 to $0FF.

With the address mapping window and bank switching scheme, user can use single type MOV instruction to access

entire 1K bytes on-chip data memory space. For example, users can have following assembly codes to write data

0x30 into expanded 768B data ram address $101 :

MOV

MOV

MOV

DBANK,#88H

A,#30H

41H, A

Specifications subject to change without notice contact your sales representatives for the most recent information.

ISSFD-M081

Ver A SM5964B 3/7/2014

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