Qualpack TSC87251G2D
2.2 Product Design
Die size
Pad size
Logic Effective channel length
Gate poly width
Gate poly spacing
Metal 1 width
Metal 1 spacing
Metal 2 width
Metal 2 spacing
Metal 3 width
Metal 3 spacing
Contact size
Via 1 size
Via 2 size
For TSC87251G2D: 17.84 mm
2
(4250 µm * 4400 µm)
For TSC83251G2D: 17.84 mm
2
(4250 µm * 4400 µm)
84 µm * 84 µm
0.42 µm
0.5 µm
0.6 µm
0.6 µm
0.7 µm
0.8 µm
0.7 µm
0.8 µm
0.7 µm
0.6 µm
0.6 µm
0.7 µm
2.3 Package Technology
2.3.1 Package description
Depending on the customer’s need. For information, the following data concern the PLCC 44.
Package weight
Chip separation method
Lead frame
Material
Thickness
Size
Lead plating
Die attach
Material
Type
Wire bonding
Material
Diameter
6
2.34g
Sawing
Cu
10 mils
270*270 mils 2
Electroplated Sn/Pb 85/15
Silver epoxy
Ablestick 84-1 LMIS
Gold
33um
Rev 0 – October 1999
TEMIC [ TEMIC SEMICONDUCTORS ]
