DS_8024RN_020
73S8024RN Data Sheet
9
OFF
and Fault Detection
There are two different cases that the system controller can monitor the
OFF
signal: to query regarding
the card presence outside card sessions, or for fault detection during card sessions.
Outside a card session: In this condition,
CMDVCC
is always high,
OFF
is low if the card is not present,
and high if the card is present. Because it is outside a card session, any fault detection will not act upon
the
OFF
signal. No deactivation is required during this time.
During a card session:
CMDVCC
is always low, and
OFF
falls low if the card is extracted or if any fault
detection is detected. At the same time that
OFF
is set low, the sequencer starts the deactivation
process.
The Figure 5 shows the timing diagram for the signals
CMDVCC,
PRES, and
OFF
during a card session
and outside the card session:
rd
OFF
is low by
card extracted
PRES
OFF
CMDVCC
VCC
OFF
is low by
any fault
outside card session
within card session
within card
session
Figure 5: Timing Diagram – Management of the Interrupt Line
OFF
10 I/O Circuitry and Timing
The states of the I/O, AUX1, and AUX2 pins are low after power on reset and they are in high when the
activation sequencer turns on the I/O reception state. See the
section for more
details on when the I/O reception is enabled. The states of I/OUC, AUX1UC, and AUX2UC are high after
power on reset.
Within a card session and when the I/O reception state is turn on, the first I/O line on which a falling edge
is detected becomes the input I/O line and the other becomes the output I/O line. When the input I/O line
rising edge is detected then both I/O lines return to their neutral state.
shows the state diagram of how the I/O and I/OUC lines are managed to become input or output.
The delay between the I/O signals is shown in Figure 7.
Rev. 1.8
13
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
