78M6612 Data Sheet
DS_6612_001
1.4.5 Instruction Set
All instructions of the generic 8051 microcontroller are supported. A complete list of the instruction set
and of the associated op-codes is contained in the Teridian
78M6612 Firmware Developer’s Manual.
1.4.6 UARTs
The 78M6612 includes a UART (UART0) that can be programmed to communicate with a variety of
external devices. A second UART (UART1) is connected to the optical port, as described in
The UARTs are dedicated 2-wire serial interfaces, which can communicate with an external device at up
to 38,400 bits/s. The operation of each pin is as follows:
UART RX: Serial input data are applied at this pin. Conforming to RS-232 standard, the bytes are
input LSB first.
•
UART TX: This pin is used to output the serial data. The bytes are output LSB first.
The 78M6612 has several UART-related registers for the control and buffering of serial data.
The serial buffers consist of sets of two separate registers (one set for each UART), a transmit buffer (S0BUF,
S1BUF)
and a receive buffer (R0BUF,
R1BUF).
Writing data to the transmit buffer starts the transmission by the
associated UART. Received data are available by reading from the receive buffer. Both UARTs can simultaneously
transmit and receive data.
WDCON[7]
selects whether timer 1 or the internal baud rate generator is used.
All UART transfers are pro-
•
grammable for parity enable, parity, 2 stop bits/1 stop bit and XON/XOFF options for variable
communication baud rates from 300 to 38,400 bps.
shows how the baud rates are calculated.
shows the selectable UART operation modes.
Table 11: Baud Rate Generation
Using Timer 1
(WDCON[7] = 0)
UART 0
UART 1
2
SMOD
* f
CKMPU
/ (384 * (256-TH1))
N/A
Using Internal Baud Rate Generator
(
WDCON[7]
= 1)
2
SMOD
* f
CKMPU
/(64 * (2
10
-S0REL))
f
CKMPU
/(32 * (2
10
-S1REL))
S0REL
and
S1REL
are 10-bit values derived by combining bits from the respective timer reload registers.
SMOD
is the
SMOD
bit in the SFR
PCON. TH1
is the high byte of timer 1.
Table 12: UART Modes
UART 0
Mode 0
UART 1
N/A
Start bit, 8 data bits, stop bit, variable
baud rate (internal baud rate generator
or timer 1).
Start bit, 8 data bits, parity, stop bit,
fixed baud rate 1/32 or 1/64 of f
CKMPU.
Start bit, 8 data bits, parity, stop bit,
variable baud rate (internal baud rate
generator or timer 1).
Start bit, 8 data bits, parity, stop bit,
variable baud rate (internal baud rate
generator).
Start bit, 8 data bits, stop bit, variable
baud rate (internal baud rate
generator).
N/A
Mode 1
Mode 2
Mode 3
N/A
24
Rev. 1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
