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W25Q16VSSIG 参数 Datasheet PDF下载

W25Q16VSSIG图片预览
型号: W25Q16VSSIG
PDF下载: 下载PDF文件 查看货源
内容描述: 具有双路和四路SPI 16M位串行闪存 [16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI]
分类和应用: 闪存存储内存集成电路光电二极管时钟
文件页数/大小: 60 页 / 1415 K
品牌: WINBOND [ WINBOND ]
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W25Q16V
10.2.16 Quad Input Page Program (32h)
The Quad Page Program instruction allows up to 256 bytes of data to be programmed at previously
erased (FFh) memory locations using four pins: IO
0
, IO
1
, IO
2
, and IO
3
. The Quad Page Program can
improve performance for PROM Programmer and applications that have slow clock speeds <5MHz.
Systems with faster clock speed will not realize much benefit for the Quad Page Program instruction
since the inherent page program time is much greater than the time it take to clock-in the data.
To use Quad Page Program the Quad Enable in Status Register-2 must be set (QE=1). A Write Enable
instruction must be executed before the device will accept the Quad Page Program instruction (Status
Register-1, WEL=1). The instruction is initiated by driving the /CS pin low then shifting the instruction
code “32h” followed by a 24-bit address (A23-A0) and at least one data byte, into the IO pins. The /CS
pin must be held low for the entire length of the instruction while data is being sent to the device. All
other functions of Quad Page Program are identical to standard Page Program. The Quad Page
Program instruction sequence is shown in figure 16.
Figure 16. Quad Input Page Program Instruction Sequence Diagram
- 33 -
Publication Release Date: October 7, 2009
Revision E