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W25X80AVSSIG 参数 Datasheet PDF下载

W25X80AVSSIG图片预览
型号: W25X80AVSSIG
PDF下载: 下载PDF文件 查看货源
内容描述: 1M位, 2M位, 4M位和8M位串行闪存4KB扇区输出和双输出的SPI [1M-BIT, 2M-BIT, 4M-BIT AND 8M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI]
分类和应用: 闪存输出元件
文件页数/大小: 45 页 / 1473 K
品牌: WINBOND [ WINBOND ]
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W25X10A, W25X20A, W25X40A, W25X80A  
10.2 INSTRUCTIONS  
The instruction set of the W25X10A/20A/40A/80A consists of fifteen basic instructions that are fully  
controlled through the SPI bus (see Instruction Set table). Instructions are initiated with the falling  
edge of Chip Select (/CS). The first byte of data clocked into the DIO input provides the instruction  
code. Data on the DIO input is sampled on the rising edge of clock with most significant bit (MSB) first.  
Instructions vary in length from a single byte to several bytes and may be followed by address bytes,  
data bytes, dummy bytes (don’t care), and in some cases, a combination. Instructions are completed  
with the rising edge of edge /CS. Clock relative timing diagrams for each instruction are included in  
figures 4 through 19. All read instructions can be completed after any clocked bit. However, all  
instructions that Write, Program or Erase must complete on a byte boundary (CS driven high after a  
full 8-bits have been clocked) otherwise the instruction will be terminated. This feature further protects  
the device from inadvertent writes. Additionally, while the memory is being programmed or erased, or  
when the Status Register is being written, all instructions except for Read Status Register will be  
ignored until the program or erase cycle has completed.  
10.2.1 Manufacturer and Device Identification  
MANUFACTURER ID  
(M7-M0)  
Winbond Serial Flash  
EFh  
(ID15-ID0)  
9Fh  
Device ID  
Instruction  
W25X10A  
W25X20A  
W25X40A  
W25X80A  
(ID7-ID0)  
ABh, 90h  
10h  
3011h  
3012h  
3013h  
3014h  
11h  
12h  
13h  
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