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W39V080APZ 参数 Datasheet PDF下载

W39V080APZ图片预览
型号: W39V080APZ
PDF下载: 下载PDF文件 查看货源
内容描述: 与LPC接口1M 】 8 CMOS FLASH MEMORY [1M 】 8 CMOS FLASH MEMORY WITH LPC INTERFACE]
分类和应用: PC
文件页数/大小: 34 页 / 357 K
品牌: WINBOND [ WINBOND ]
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W39V080A
Timing Waveforms for LPC Interface Mode, continued
14.6 Sector Erase Timing Diagram
CLK
#RESET
#LFRAME
Memory
Write
1st Start Cycle
LAD[3:0]
0000b 011Xb
XXXXb
XXXXb
XXXXb
Data
X101b
0101b
0101b
0101b
1010b
1010b
1111b
TAR
Tri-State
Sync
0000b
TAR
Start next
command
Address
XXXXb
1 Clock 1 Clock
Load Address "5555" in 8 Clocks
Load Data "AA"
in 2 Clocks
2 Clocks
1 Clock
1 Clock
Write the 1st command to the device in LPC mode.
CLK
#RESET
#LFRAME
Memory
Write
2nd Start Cycle
0000b 011Xb
LAD[3:0]
XXXXb
XXXXb
XXXXb
Start next
command
TAR
Address
XXXXb
X010b
1010b
1010b
1010b
Data
0101b
0101b
TAR
1111b
Tri-State
Sync
0000b
1 Clock 1 Clock
Load Address "2AAA" in 8 Clocks
Load Data "55"
in 2 Clocks
2 Clocks
1 Clock
1 Clock
Write the 2nd command to the device in LPC mode.
CLK
#RESET
#LFRAME
Memory
Write
3rd Start Cycle
LAD[3:0]
0000b 011Xb
XXXXb
XXXXb
XXXXb
Start next
command
TAR
Address
XXXXb
X101b
0101b
0101b
0101b
Data
0000b
1000b
TAR
1111b
Tri-State
Sync
0000b
1 Clocks Clocks
1
Load Address "5555" in 8 Clocks
Load Data "80"
in 2 Clocks
2 Clocks
1 Clocks
1 Clocks
Write the 3rd command to the device in LPC mode.
CLK
#RESET
#LFRAME
Memory
Write
4th Start Cycle
LAD[3:0]
0000b 011Xb
XXXXb
XXXXb
XXXXb
Start next
command
TAR
Address
XXXXb
X101b
0101b
0101b
0101b
Data
1010b
1010b
TAR
1111b
Tri-State
Sync
0000b
1 Clock 1 Clock
Load Address "5555" in 8 Clocks
Load Data "AA"
in 2 Clocks
2 Clocks
1 Clock
1 Clock
Write the 4th command to the device in LPC mode.
CLK
#RESET
#LFRAME
Memory
Write
5th Start Cycle
LAD[3:0]
0000b 011Xb
XXXXb
XXXXb
XXXXb
Start next
command
TAR
Address
XXXXb
X010b
1010b
1010b
1010b
Data
0101b
0101b
TAR
1111b
Tri-State
Sync
0000b
1 Clock 1 Clock
Load Address "2AAA" in 8 Clocks
Load Data "55"
in 2 Clocks
2 Clocks
1 Clock
1 Clock
Write the 5th command to the device in LPC mode.
CLK
#RESET
#LFRAME
Memory
Write
6th Start Cycle
LAD[3:0]
0000b 011Xb
XXXXb
XXXXb
XXXXb
Internal
erase start
Address
SA[19:16]
Data
XXXXb
XXXXb
XXXXb
XXXXb
0000b
0011b
TAR
1111b
Tri-State
Sync
0000b
TAR
Internal
erase start
1 Clock 1 Clock
Load Sector Address in 8 Clocks
Load Data "30"
in 2 Clocks
2 Clocks
1 Clock
Write the 6th command(target sector to be erased) to the device in LPC mode.
- 29 -
Publication Release Date: Dec. 28, 2005
Revision A4