X40430/X40431 – Preliminary Information
Figure 6. V
Set/Reset Sequence (X = 1, 2, 3)
TRIP
V
Programming
TRIPX
Desired
TRIPX
No
V
Present Value
YES
Execute
V
Reset Sequence
TRIP
Execute
Set Higher V
Sequence
TRIP
New V applied =
Execute
New V applied =
X
X
Set Higher V Sequence
Old V applied - Error
Old V applied + Error
X
X
X
Apply V and Voltage
CC
Execute Reset V
TRIPX
Sequence
Desired V
to
V
TRIPX
X
NO
Decrease
V
X
Output Switches?
YES
Error < -MDE
V
Error > +MDE
Actual
TRIPX –
V
Desired
TRIPX
Error < | MDE |
DONE
Vx = V , V2MON, V3MON
CC
Note: X = 1, 2, 3
Let: MDE = Maximum Desired Error
WEL: Write Enable Latch (Volatile)
Once set, WEL remains set until either it is reset to 0
(by writing a “0” to the WEL bit and zeroes to the other
bits of the control register) or until the part powers up
again. Writes to the WEL bit do not cause a high volt-
age write cycle, so the device is ready for the next
operation immediately after the stop condition.
The WEL bit controls the access to the memory and to
the Register during a write operation. This bit is a vola-
tile latch that powers up in the LOW (disabled) state.
While the WEL bit is LOW, writes to any address,
including any control registers will be ignored (no
acknowledge will be issued after the Data Byte). The
WEL bit is set by writing a “1” to the WEL bit and
zeroes to the other bits of the control register.
Characteristics subject to change without notice. 7 of 24
REV 1.2.3 11/28/00
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