X40430/X40431 – Preliminary Information
Low Voltage V
(V1 Monitoring)
Figure 2. Two Uses of Multiple Voltage Monitoring
CC
During operation, the X40430 monitors the V
level
CC
and asserts RESET if supply voltage falls below a pre-
set minimum V . The RESET signal prevents the
microprocessor from operating in a power fail or
brownout condition. The RESET/RESET signal
remains active until the voltage drops below 1V. It also
V2MON
TRIP1
X40430
5V
Unreg.
Supply
V
CC
System
Reset
Reg
RESET
V2MON
V2FAIL
remains active until V
returns and exceeds V
CC
TRIP1
R
for t
.
PURST
R
Low Voltage V2 Monitoring
The X40430 also monitors a second voltage level and
asserts V2FAIL if the voltage falls below a preset mini-
Resistors selected so 3V appears on V2MON when unregulated
supply reaches 6V.
mum V
. The V2FAIL signal is either ORed with
TRIP2
RESET to prevent the microprocessor from operating
in a power fail or brownout condition or used to inter-
rupt the microprocessor with notification of an impend-
ing power failure. The V2FAIL signal remains active
until the V2MON drops below 1V (V2MON falling). It
also remains active until V2MON returns and exceeds
V2MON
V
V3MON
CC
X40431
Unreg.
Supply
5V
V
Reg
CC
System
Reset
RESET
V2MON
4V
Reg
V
by 0.2V.
TRIP2
V2FAIL
3V
Reg
Low Voltage V3 Monitoring
V3MON
V3FAIL
The X40430 also monitors a third voltage level and
asserts V3FAIL if the voltage falls below a preset mini-
Notice: No external components required to monitor three voltages.
mum V
. The V3FAIL signal is either ORed with
TRIP3
RESET to prevent the microprocessor from operating
in a power fail or brownout condition or used to inter-
rupt the microprocessor with notification of an impend-
ing power failure. The V3FAIL signal remains active
until the V3MON drops below 1V (V3MON falling). It
also remains active until V3MON returns and exceeds
V
by 0.2V.
TRIP3
Early Low V
Detection (LOWLINE)
CC
This CMOS output goes LOW earlier than RESET/
RESET whenever V falls below the V voltage
CC
TRIP1
and returns high when V
age. There is no power up delay circuitry (t
this pin.
exceeds the V
volt-
) on
CC
TRIP1
PURST
Characteristics subject to change without notice. 4 of 24
REV 1.2.3 11/28/00
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